18121429. SEMICONDUCTOR PACKAGE simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
SEMICONDUCTOR PACKAGE
Organization Name
Inventor(s)
Hyeonseok Lee of Suwon-si (KR)
Hyeonjeong Hwang of Suwon-si (KR)
SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18121429 titled 'SEMICONDUCTOR PACKAGE
Simplified Explanation
The semiconductor package described in the patent application consists of several components including a redistribution substrate, a semiconductor chip, a conductive structure, a molding layer, and a second redistribution substrate.
- The first redistribution substrate serves as a base for the package.
- The semiconductor chip is placed on the top surface of the first redistribution substrate.
- A conductive structure is located on the top surface of the first redistribution substrate, but it is spaced apart from the semiconductor chip.
- A molding layer covers the side surface of the semiconductor chip and the conductive structure.
- The second redistribution substrate is positioned on top of the molding layer and the conductive structure.
- The conductive structure consists of a first conductive structure on the first redistribution substrate and a second conductive structure on top of the first conductive structure.
- The second redistribution substrate includes an insulating layer, and at least a portion of the top surface of the second conductive structure directly contacts the insulating layer.
Potential applications of this technology:
- Semiconductor packaging for electronic devices such as smartphones, tablets, and computers.
- Integrated circuits and microprocessors used in various industries including automotive, aerospace, and telecommunications.
Problems solved by this technology:
- Provides a compact and efficient packaging solution for semiconductor chips.
- Protects the semiconductor chip and conductive structure from external elements and damage.
- Enables improved electrical connections and signal transmission between the semiconductor chip and external components.
Benefits of this technology:
- Reduces the size and weight of electronic devices by providing a compact packaging solution.
- Enhances the performance and reliability of semiconductor chips by protecting them from external factors.
- Enables higher data transfer rates and improved functionality of integrated circuits.
Original Abstract Submitted
A semiconductor package includes a first redistribution substrate, a semiconductor chip provided on a top surface of the first redistribution substrate, a conductive structure provided on the top surface of the first redistribution substrate and spaced apart from the semiconductor chip, a molding layer provided on the first redistribution substrate and covering a side surface of the semiconductor chip and a side surface of the conductive structure, and a second redistribution substrate on the molding layer and the conductive structure. The conductive structure includes a first conductive structure provided on the first redistribution substrate, and a second conductive structure provided on a top surface of the first conductive structure. The second redistribution substrate includes an insulating layer. At least a portion of a top surface of the second conductive structure directly contacts the insulating layer of the second redistribution substrate.
