18121158. PACKAGE AND METHOD OF FABRICATING THE SAME simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
PACKAGE AND METHOD OF FABRICATING THE SAME
Organization Name
Inventor(s)
SANGHYEON Jeong of Suwon-si (KR)
PACKAGE AND METHOD OF FABRICATING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 18121158 titled 'PACKAGE AND METHOD OF FABRICATING THE SAME
Simplified Explanation
The abstract describes a package that includes a lower substrate, a lower chip, posts, an upper substrate, a cavity, and a crack stiffener. The crack stiffener is designed to reduce the formation of cracks in the upper substrate.
- The package includes a lower substrate, which serves as a base.
- A lower chip is provided on the lower substrate, likely for electronic components.
- Posts are provided on an edge of the lower substrate, outside of the lower chip.
- An upper substrate is provided on the posts and the lower chip.
- The upper substrate has a cavity formed on its bottom surface.
- A crack stiffener is provided at the edge of the cavity to prevent cracks in the upper substrate.
Potential applications of this technology:
- Electronics packaging: This package design could be used for various electronic components, such as microchips, sensors, or integrated circuits.
- Semiconductor industry: The crack stiffener could be beneficial in preventing cracks in delicate semiconductor materials during packaging and handling processes.
Problems solved by this technology:
- Cracks in the upper substrate: The crack stiffener helps reduce the formation of cracks in the upper substrate, which can be a common issue during packaging and handling of electronic components.
Benefits of this technology:
- Enhanced reliability: By reducing the formation of cracks, the package offers improved reliability for the electronic components.
- Protection for delicate materials: The crack stiffener provides an additional layer of protection for delicate materials, such as semiconductors, preventing damage during packaging and handling.
Original Abstract Submitted
A package includes a lower substrate, a lower chip provided on the lower substrate, posts provided on an edge of the lower substrate and outside of the lower chip, an upper substrate provided on the posts and the lower chip, the upper substrate including a cavity formed on a bottom surface of the upper substrate, and a crack stiffener provided at an edge of the cavity, where the crack stiffener is configured to reduce formation of a crack in the upper substrate.
