18119327. SEMICONDUCTOR PACKAGES simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

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SEMICONDUCTOR PACKAGES

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

Jingu Kim of Suwon-si (KR)

Yieok Kwon of Suwon-si (KR)

Sangkyu Lee of Suwon-si (KR)

Taesung Jeong of Suwon-si (KR)

SEMICONDUCTOR PACKAGES - A simplified explanation of the abstract

This abstract first appeared for US patent application 18119327 titled 'SEMICONDUCTOR PACKAGES

Simplified Explanation

The semiconductor package described in the patent application includes several components and structures:

1. A first redistribution structure with a redistribution layer. 2. A semiconductor chip placed on the first surface of the first redistribution structure, with a connection pad electrically connected to the first redistribution layer. 3. An encapsulant that surrounds at least a portion of the semiconductor chip. 4. A second redistribution structure on the encapsulant, including a second redistribution layer. 5. A through-via structure that extends through the encapsulant, electrically connecting the first redistribution layer to the second redistribution layer. 6. An organic material layer between the through-via structure and the encapsulant, with a higher elongation rate than the encapsulant. 7. A bump structure on the second surface of the first redistribution structure.

Potential applications of this technology:

  • Semiconductor packaging for integrated circuits.
  • Electronic devices requiring compact and efficient packaging.

Problems solved by this technology:

  • Provides electrical connections between different layers of the semiconductor package.
  • Protects the semiconductor chip from external elements and damage.
  • Enhances the mechanical stability of the package.

Benefits of this technology:

  • Improved electrical connectivity and signal transmission within the semiconductor package.
  • Enhanced protection and durability for the semiconductor chip.
  • Compact and efficient packaging design for electronic devices.


Original Abstract Submitted

A semiconductor package includes a first redistribution structure including a first redistribution layer; a semiconductor chip on a first surface of the first redistribution structure and including a connection pad electrically connected to the first redistribution layer; an encapsulant that surrounds at least a portion of the semiconductor chip; a second redistribution structure on the encapsulant and including a second redistribution layer; a through-via structure that extends through the encapsulant and electrically connects the first redistribution layer to the second redistribution layer; an organic material layer between the through-via structure and the encapsulant and having an elongation rate greater than an elongation rate of the encapsulant; and a bump structure on a second surface of the first redistribution structure.