18113445. SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF simplified abstract (KABUSHIKI KAISHA TOSHIBA)
Contents
- 1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Original Abstract Submitted
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
Organization Name
Inventor(s)
Takako Motai of Yokohama Kanagawa (JP)
Yoko Iwakaji of Meguro Tokyo (JP)
Kaori Fuse of Yokohama Kanagawa (JP)
Keiko Kawamura of Yokohama Kanagawa (JP)
Kentaro Ichinoseki of Higashimurayama Tokyo (JP)
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A simplified explanation of the abstract
This abstract first appeared for US patent application 18113445 titled 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
Simplified Explanation
The semiconductor device described in the abstract includes a semiconductor substrate with a cell region and a termination region. The termination region surrounds the cell region and consists of multiple diffusion layers with varying concentrations of a conductive impurity, as well as conductive layers electrically connected to the diffusion layers.
- The semiconductor device has a termination region with multiple diffusion layers containing a conductive impurity, as well as conductive layers connected to these diffusion layers.
- The diffusion layers in the termination region have different concentrations of the conductive impurity, with the outermost layers having lower concentrations.
- The conductive layers in the termination region are positioned opposite the diffusion layers on the front face of the semiconductor substrate.
Potential Applications
This technology could be applied in:
- Power semiconductor devices
- High-voltage applications
- Integrated circuits requiring precise control of conductivity
Problems Solved
This technology helps address issues related to:
- Controlling conductivity in semiconductor devices
- Enhancing the performance and reliability of semiconductor components
- Improving the efficiency of power electronics
Benefits
The benefits of this technology include:
- Enhanced conductivity control
- Improved device performance
- Increased reliability and efficiency in semiconductor applications
Potential Commercial Applications
This technology could find commercial applications in:
- Power electronics industry
- Semiconductor manufacturing companies
- Research and development of advanced electronic devices
Possible Prior Art
One possible prior art related to this technology is the use of diffusion layers with varying impurity concentrations in semiconductor devices to control conductivity.
Unanswered Questions
How does this technology compare to existing methods of conductivity control in semiconductor devices?
This article does not provide a direct comparison with other methods of conductivity control in semiconductor devices.
What are the specific performance improvements achieved by this innovation compared to traditional semiconductor structures?
The article does not detail the specific performance improvements achieved by this innovation in comparison to traditional semiconductor structures.
Original Abstract Submitted
A semiconductor device includes a semiconductor substrate, a cell region provided, and a termination region. The termination region surrounds the cell region and includes a plurality of first diffusion layers containing a first conductive impurity, a plurality of second diffusion layers each disposed on an outer side of each of the plurality of first diffusion layers and having a concentration of the first conductive impurity lower than that of the first diffusion layers, and a plurality of conductive layers opposing the first diffusion layers and the second diffusion layers on the front face of the semiconductor substrate, the plurality of conductive layers electrically connected to the first diffusion layers, the plurality of conductive layers each having an outer end portion. On a lower side of the outer end portion, any one of the plurality of second diffusion layers is present.