18109442. SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

Kiseok Lee of Suwon-si (KR)

Jongmin Kim of Suwon-si (KR)

Hyo-Sub Kim of Suwon-si (KR)

Hui-Jung Kim of Suwon-si (KR)

Sohyun Park of Suwon-si (KR)

Junhyeok Ahn of Suwon-si (KR)

Chan-Sic Yoon of Suwon-si (KR)

Myeong-Dong Lee of Suwon-si (KR)

Woojin Jeong of Suwon-si (KR)

Wooyoung Choi of Suwon-si (KR)

SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 18109442 titled 'SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME

Simplified Explanation

The patent application describes a semiconductor device that includes a cell active pattern, a gate structure, a bit-line contact, a connection pattern, and a cell separation pattern.

• The cell active pattern consists of two portions that are spaced apart from each other.
• The gate structure is located between the two portions of the cell active pattern.
• The bit-line contact is positioned on the first portion of the cell active pattern.
• The connection pattern is located on the second portion of the cell active pattern.
• The cell separation pattern is in contact with both the bit-line contact and the connection pattern.
• The cell separation pattern has two sidewalls, with the first sidewall in contact with the connection pattern and the second sidewall in contact with the bit-line contact.
• The upper portion of the second sidewall of the cell separation pattern is in contact with the bit-line contact, while the lower portion is spaced apart from the bit-line contact.

Potential applications of this technology:

• Semiconductor manufacturing
• Integrated circuit design
• Memory devices

Problems solved by this technology:

• Provides a structure for efficient cell separation in a semiconductor device
• Helps to prevent interference between different portions of the cell active pattern

Benefits of this technology:

• Improved performance and reliability of semiconductor devices
• Enhanced manufacturing efficiency and yield

Original Abstract Submitted

A semiconductor device includes a cell active pattern including a first portion and a second portion that are spaced apart from each other; a gate structure between the first portion and the second portion of the cell active pattern; a bit-line contact on the first portion of the cell active pattern; a connection pattern on the second portion of the cell active pattern; and a cell separation pattern in contact with the bit-line contact and the connection pattern, wherein the cell separation pattern includes a first sidewall in contact with the connection pattern and a second sidewall in contact with the bit-line contact, an upper portion of the second sidewall of the cell separation pattern is in contact with the bit-line contact, and a lower portion of the second sidewall of the cell separation pattern is spaced apart from the bit-line contact.