18099808. NONVOLATILE MEMORY DEVICE AND METHOD OF CONTROLLING READ OPERATION OF THE SAME simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
NONVOLATILE MEMORY DEVICE AND METHOD OF CONTROLLING READ OPERATION OF THE SAME
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NONVOLATILE MEMORY DEVICE AND METHOD OF CONTROLLING READ OPERATION OF THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 18099808 titled 'NONVOLATILE MEMORY DEVICE AND METHOD OF CONTROLLING READ OPERATION OF THE SAME
Simplified Explanation
The patent application describes a nonvolatile memory device that includes a bitline, a precharge transistor, a cell string, and a current control switch circuit.
- The precharge transistor connects the bitline to a power supply voltage during a read operation to transmit a bitline current from the power supply voltage to the bitline.
- The cell string, which consists of multiple memory cells, is connected between the bitline and a source line. It transmits a portion of the bitline current as a cell current.
- The current control switch circuit is connected between the bitline and a sink node. It transmits another portion of the bitline current as a control current flowing from the bitline to the sink node during the precharge period.
Potential applications of this technology:
- Nonvolatile memory devices, such as flash memory or solid-state drives.
- Computer systems and electronic devices that require high-speed and efficient memory storage.
Problems solved by this technology:
- Efficiently controlling the flow of current in a nonvolatile memory device during a read operation.
- Reducing power consumption and improving the overall performance of the memory device.
Benefits of this technology:
- Improved speed and efficiency in reading data from the memory device.
- Reduced power consumption, leading to longer battery life in portable electronic devices.
- Enhanced overall performance and reliability of nonvolatile memory devices.
Original Abstract Submitted
A nonvolatile memory device is provided. The nonvolatile memory device includes: a bitline; a precharge transistor configured to electrically connect the bitline to a power supply voltage during a precharge period of a read operation to transmit a bitline current flowing from the power supply voltage to the bitline; a cell string connected between the bitline and a source line, the cell string including a plurality of memory cells and being configured to transmit a first portion of the bitline current as a cell current; and a current control switch circuit connected between the bitline and a sink node, the current control switch circuit being configured to transmit a second portion of the bitline current as a control current flowing from the bitline to the sink node during the precharge period.
