18096623. DISPLAY PANEL simplified abstract (Samsung Display Co., Ltd.)
Contents
DISPLAY PANEL
Organization Name
Inventor(s)
Seokje Seong of Yongin-si (KR)
Seongjun Lee of Yongin-si (KR)
Jeongsoo Lee of Yongin-si (KR)
DISPLAY PANEL - A simplified explanation of the abstract
This abstract first appeared for US patent application 18096623 titled 'DISPLAY PANEL
Simplified Explanation
The abstract describes a display panel with various components including thin film transistors, data lines, scan lines, and a shield line. The first and third thin film transistors have different semiconductor layers and gate electrodes. The shield line is made of the same material as the upper gate electrode of the third thin film transistor.
- The display panel includes a substrate, thin film transistors, data lines, scan lines, and a shield line.
- The first and third thin film transistors have different semiconductor layers and gate electrodes.
- The shield line is made of the same material as the upper gate electrode of the third thin film transistor.
Potential Applications
- Display panels for electronic devices such as smartphones, tablets, and televisions.
- Monitors and screens for computer systems and gaming consoles.
- Public displays and digital signage for advertising and information dissemination.
Problems Solved
- Improved performance and functionality of display panels.
- Enhanced image quality and resolution.
- Reduction of interference and noise in display panels.
Benefits
- Higher efficiency and reliability of display panels.
- Enhanced visual experience for users.
- Increased durability and lifespan of display panels.
Original Abstract Submitted
A display panel includes a substrate, a first thin film transistor including a first semiconductor layer and a first gate electrode, a data line extending in a first direction, a scan line extending in a second direction, a second thin film transistor electrically connected to the data line and including a second semiconductor layer and a second gate electrode, a third thin film transistor including a third semiconductor layer and a first upper gate electrode arranged on the third semiconductor layer, a node connection line electrically connecting the first thin film transistor and the third thin film transistor, and a shield line located between the data line and the node connection line in a plan view and including the same material as the first upper gate electrode of the third thin film transistor. The first semiconductor layer includes a silicon semiconductor, and the third semiconductor layer includes an oxide semiconductor.
