18096053. MEMORY DEVICE, A CONTROLLER FOR CONTROLLING THE SAME, A MEMORY SYSTEM INCLUDING THE SAME, AND AN OPERATING METHOD OF THE SAME simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

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MEMORY DEVICE, A CONTROLLER FOR CONTROLLING THE SAME, A MEMORY SYSTEM INCLUDING THE SAME, AND AN OPERATING METHOD OF THE SAME

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

Yesin Ryu of Seoul (KR)

Sunggi Ahn of Jinju-si (KR)

Jaeyoun Youn of Seoul (KR)

MEMORY DEVICE, A CONTROLLER FOR CONTROLLING THE SAME, A MEMORY SYSTEM INCLUDING THE SAME, AND AN OPERATING METHOD OF THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 18096053 titled 'MEMORY DEVICE, A CONTROLLER FOR CONTROLLING THE SAME, A MEMORY SYSTEM INCLUDING THE SAME, AND AN OPERATING METHOD OF THE SAME

Simplified Explanation

The patent application describes a memory device with an error correction circuit and an error check and scrub (ECS) circuit. The ECS circuit performs a scrubbing operation on the memory cell array and includes two registers: one to store error addresses obtained during scrubbing and another to store a page offline address received from an external device.

  • The memory device has a memory cell array with multiple memory cells at intersections of wordlines and bitlines.
  • An error correction circuit is included to read data from the memory cell array and correct any errors in the read data.
  • The error check and scrub (ECS) circuit performs a scrubbing operation on the memory cell array.
  • The ECS circuit includes a first register to store error addresses obtained during the scrubbing operation.
  • The ECS circuit also includes a second register to store a page offline address received from an external device.

Potential Applications

  • This memory device can be used in various electronic devices that require reliable and error-free data storage, such as computers, smartphones, and servers.
  • It can be particularly useful in applications where data integrity is critical, such as in financial systems, healthcare systems, and data centers.

Problems Solved

  • The error correction circuit helps in identifying and correcting errors in the read data, ensuring accurate and reliable data storage.
  • The ECS circuit performs a scrubbing operation to proactively identify and correct errors in the memory cell array, preventing data corruption and improving overall data integrity.

Benefits

  • The memory device provides enhanced data integrity by incorporating error correction and scrubbing operations.
  • The error correction circuit and ECS circuit help in maintaining the accuracy and reliability of stored data.
  • The ability to store error addresses and page offline addresses in registers allows for efficient error management and troubleshooting.


Original Abstract Submitted

A memory device including: a memory cell array including a plurality of memory cells disposed at intersections of wordlines and bitlines; an error correction circuit configured to read data from the memory cell array and to correct an error in the read data; and an error check and scrub (ECS) circuit configured to perform a scrubbing operation on the memory cell array, wherein the ECS circuit includes: a first register configured to store an error address obtained in the scrubbing operation; and a second register configured to store a page offline address received from an external device.