18095674. METHOD AND APPARATUS WITH NEURAL NETWORK DATA INPUT AND OUTPUT CONTROL simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

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METHOD AND APPARATUS WITH NEURAL NETWORK DATA INPUT AND OUTPUT CONTROL

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

HYUNG-DAL Kwon of Hwaseong-si (KR)

METHOD AND APPARATUS WITH NEURAL NETWORK DATA INPUT AND OUTPUT CONTROL - A simplified explanation of the abstract

This abstract first appeared for US patent application 18095674 titled 'METHOD AND APPARATUS WITH NEURAL NETWORK DATA INPUT AND OUTPUT CONTROL

Simplified Explanation

The abstract describes a neural network deep learning data control apparatus that includes an encoding circuit and a decoding circuit. The encoding circuit compresses a data sequence by combining consecutive invalid bits into a single bit and generates a validity determination sequence indicating valid and invalid bits. The compressed data sequence and the validity determination sequence are then stored in memory. The decoding circuit reads the compressed data sequence and the validity determination sequence from memory and determines which bits in the compressed data sequence should be transmitted to the neural network circuit based on the validity determination sequence. This allows the neural network circuit to skip operations on non-consecutive invalid bits.

  • Neural network deep learning data control apparatus with encoding and decoding circuits.
  • Encoding circuit compresses data sequence by combining consecutive invalid bits.
  • Generates validity determination sequence indicating valid and invalid bits.
  • Compressed data sequence and validity determination sequence are stored in memory.
  • Decoding circuit reads compressed data sequence and validity determination sequence.
  • Determines which bits in compressed data sequence should be transmitted to neural network circuit.
  • Neural network circuit skips operations on non-consecutive invalid bits.

Potential Applications

  • Deep learning systems
  • Artificial intelligence
  • Data compression and storage systems

Problems Solved

  • Reduces the number of operations performed by the neural network circuit.
  • Efficiently handles invalid bits in data sequences.

Benefits

  • Improved efficiency and speed of deep learning systems.
  • Reduced memory usage and storage requirements.
  • Enhanced performance of artificial intelligence systems.


Original Abstract Submitted

A neural network deep learning data control apparatus includes: a memory; an encoding circuit configured to receive a data sequence, generate a compressed data sequence in which consecutive invalid bits in a bit string of the data sequence are compressed into a single bit of the compressed data sequence, generate a validity determination sequence indicating a valid bit and an invalid bit in a bit string of the compressed data sequence, and write the compressed data sequence and the validity determination sequence to the memory; and a decoding circuit configured to read the compressed data sequence and the validity determination sequence from the memory, and determine a bit in the bit string of the compressed data sequence set for transmission to a neural network circuit, based on the validity determination sequence, such that the neural network circuit omits an operation with respect to non-consecutive invalid bits.

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