18093880. SEMICONDUCTOR DEVICES INCLUDING A THICK METAL LAYER AND A BUMP simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

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SEMICONDUCTOR DEVICES INCLUDING A THICK METAL LAYER AND A BUMP

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

Minjung Choi of Suwon-si (KR)

Sooho Shin of Hwaseong-si (KR)

Yeonjin Lee of Suwon-si (KR)

Junghoon Han of Hwaseong-si (KR)

SEMICONDUCTOR DEVICES INCLUDING A THICK METAL LAYER AND A BUMP - A simplified explanation of the abstract

This abstract first appeared for US patent application 18093880 titled 'SEMICONDUCTOR DEVICES INCLUDING A THICK METAL LAYER AND A BUMP

Simplified Explanation

The abstract describes a semiconductor device with specific features and configurations. Here is a simplified explanation of the abstract:

  • The semiconductor device consists of multiple layers, including an interlayer insulating layer, middle interconnections, a pad, an upper interconnection, and a protective insulating layer.
  • The protective insulating layer covers the edge of the pad, the upper interconnection, and the gap between them, with an opening on the pad.
  • A bump is placed on the pad, extending onto the protective insulating layer and overlapping the upper interconnection.
  • The middle interconnections closest to the pad have a certain thickness, while the pad has a thickness that is significantly larger.
  • The gap between the pad and the upper interconnection has a minimum length requirement.
  • The upper surface of the protective insulating layer is flat and even.

Potential applications of this technology:

  • Semiconductor manufacturing industry
  • Electronics manufacturing industry
  • Integrated circuit production

Problems solved by this technology:

  • Provides a protective layer for the pad and upper interconnection, preventing damage or interference.
  • Ensures a specific thickness for the middle interconnections and pad, optimizing performance and functionality.
  • Defines a minimum length for the gap between the pad and upper interconnection, ensuring proper electrical connections.

Benefits of this technology:

  • Enhanced protection for sensitive components of the semiconductor device.
  • Improved performance and functionality due to optimized thickness of interconnections.
  • Reliable electrical connections between the pad and upper interconnection.


Original Abstract Submitted

A semiconductor device includes an interlayer insulating layer disposed on a substrate; a plurality of middle interconnections disposed in the interlayer insulating layer; a pad disposed on the interlayer insulating layer; an upper interconnection disposed on the interlayer insulating layer; a protective insulating layer covering an edge of the pad, the upper interconnection, and a horizontal gap between the pad and the upper interconnection, the protective insulating layer having an opening on the pad; and a bump disposed on the pad, the bump extending on the protective insulating layer and overlapping the upper interconnection from a top-down view. At least one of the plurality of middle interconnections from among middle interconnections vertically closest to the pad has a first vertical thickness, the pad has a second vertical thickness that is twice to 100 times the first vertical thickness, a length of the gap between the pad and the upper interconnection is 1 μm or more, and an upper surface of the protective insulating layer is planar.