18092994. SEMICONDUCTOR PACKAGE HAVING PADS WITH STEPPED STRUCTURE simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

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SEMICONDUCTOR PACKAGE HAVING PADS WITH STEPPED STRUCTURE

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

MYUNG KEE Chung of HWASEONG-SI (KR)

HYUN SOO Chung of HWASEONG-SI (KR)

TAE WON Yoo of SEOUL (KR)

SEMICONDUCTOR PACKAGE HAVING PADS WITH STEPPED STRUCTURE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18092994 titled 'SEMICONDUCTOR PACKAGE HAVING PADS WITH STEPPED STRUCTURE

Simplified Explanation

The patent application describes a semiconductor package that includes multiple semiconductor chips stacked on top of each other.

  • The package consists of a first semiconductor chip, a second semiconductor chip placed on top of the first chip, and a third semiconductor chip placed on top of the second chip.
  • A first pad is located on the top surface of the second chip and has two parts - a wider first portion and a narrower second portion that protrudes vertically from the first portion.
  • On the bottom surface of the third chip, facing the top surface of the second chip, there is a second pad.
  • A solder ball is placed around the sidewall of the second portion of the first pad, creating a connection between the first pad and the second pad.

Potential applications of this technology:

  • This semiconductor package design can be used in various electronic devices, such as smartphones, tablets, and computers.
  • It can be utilized in high-performance computing systems, where multiple chips need to be stacked to achieve higher processing power.
  • The design can also be applied in automotive electronics, aerospace systems, and other industries that require compact and efficient semiconductor packaging.

Problems solved by this technology:

  • The stacked semiconductor chips require a reliable and efficient method of interconnecting them.
  • The design addresses the challenge of creating a secure connection between the first and second pads using a solder ball.
  • By providing a protruding second portion on the first pad, the design ensures a strong and stable connection between the pads.

Benefits of this technology:

  • The semiconductor package allows for compact and efficient stacking of multiple chips, saving space and enabling higher performance.
  • The design provides a reliable interconnection between the stacked chips, reducing the risk of connection failures.
  • The use of solder balls enhances the electrical and thermal conductivity between the pads, improving overall performance and reliability.


Original Abstract Submitted

A semiconductor package including a first semiconductor chip, a second semiconductor chip disposed on the first semiconductor chip, and a third semiconductor chip disposed on the second semiconductor chip. A first pad is disposed on a top surface of the second semiconductor chip, and includes a first portion and a second portion protruding in a vertical direction from the first portion. A width of the first portion in a first horizontal direction is greater than a width of the second portion in the first horizontal direction. A second pad is disposed on a bottom surface of the third semiconductor chip facing the top surface of the second semiconductor chip, and a solder ball is disposed as surrounding a sidewall of the second portion of the first pad between the first pad and the second pad.