18082617. METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE simplified abstract (Samsung Electronics Co., Ltd.)
Contents
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
Organization Name
Inventor(s)
Jae-Hyun Lee of Hwaseong-si (KR)
Jong-Han Lee of Namyangju-si (KR)
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18082617 titled 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
Simplified Explanation
The patent application describes a semiconductor device that includes multiple active fins on a substrate, with fin-field effect transistors (finFETs) on the active fins. The finFETs have gate structures with gate insulation layers and gate electrodes. The device also includes a second active fin with a different gate insulation layer.
- The semiconductor device has multiple active fins on a substrate.
- The active fins have finFETs with gate structures, gate insulation layers, and gate electrodes.
- The device includes a second active fin with a different gate insulation layer.
Potential applications of this technology:
- Integrated circuits
- Microprocessors
- Memory devices
- Communication devices
Problems solved by this technology:
- Improved performance and efficiency of semiconductor devices
- Enhanced control over the flow of electrical current
- Reduction of power consumption
Benefits of this technology:
- Higher processing speeds
- Lower power consumption
- Improved functionality and reliability of semiconductor devices
Original Abstract Submitted
A semiconductor device may include a plurality of first active fins protruding from a substrate, each of the first active fins extending in a first direction; a second active fin protruding from the substrate; and a plurality of respective first fin-field effect transistors (finFETs) on the first active fins. Each of the first finFETs includes a first gate structure extending in a second direction perpendicular to the first direction, and the first gate structure includes a first gate insulation layer and a first gate electrode. The first finFETs are formed on a first region of the substrate and have a first metal oxide layer as the first gate insulation layer, and a second finFET is formed on the second active fin on a second region of the substrate, and the second finFET does not include a metal oxide layer, but includes a second gate insulation layer that has a bottom surface at the same plane as a bottom surface of the first metal oxide layer.
