18076628. SEMICONDUCTOR MEMORY DEVICE AND METHODS OF OPERATION simplified abstract (Samsung Electronics Co., Ltd.)

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SEMICONDUCTOR MEMORY DEVICE AND METHODS OF OPERATION

Organization Name

Samsung Electronics Co., Ltd.

Inventor(s)

Kiheung Kim of Suwon-si (KR)

Taeyoung Oh of Seoul (KR)

Hyeran Kim of Uiwang-si (KR)

Sungyong Cho of Anyang-si (KR)

Kyungsoo Ha of Hwaseong-si (KR)

SEMICONDUCTOR MEMORY DEVICE AND METHODS OF OPERATION - A simplified explanation of the abstract

This abstract first appeared for US patent application 18076628 titled 'SEMICONDUCTOR MEMORY DEVICE AND METHODS OF OPERATION

Simplified Explanation

The patent application describes a semiconductor memory device that includes a memory cell array, a row hammer management circuit, and a control logic circuit. The row hammer management circuit counts the number of times each memory cell row is accessed and stores the count data in count cells within each row. In response to a command, the circuit performs a read-update-write operation to update the count data. The control logic circuit performs a write operation to write the updated count data in the count cells during a shorter time interval than a normal write operation.

  • The memory device includes a memory cell array, row hammer management circuit, and control logic circuit.
  • The row hammer management circuit counts the number of times each memory cell row is accessed.
  • The count data is stored in count cells within each memory cell row.
  • A read-update-write operation is performed to update the count data in response to a command.
  • The control logic circuit performs a write operation to write the updated count data in the count cells.
  • The write operation is completed in a shorter time interval than a normal write operation.

Potential Applications

  • This technology can be applied in various semiconductor memory devices, such as RAM (Random Access Memory) modules used in computers and mobile devices.
  • It can be used in systems that require efficient management of memory cell access and prevention of row hammer issues.

Problems Solved

  • The technology solves the problem of row hammer issues, which can cause data corruption and system instability in memory devices.
  • It addresses the need for accurate counting and tracking of memory cell access to prevent row hammer problems.

Benefits

  • The memory device provides improved row hammer management by counting and tracking memory cell access.
  • The read-update-write operation ensures accurate count data and prevents data corruption.
  • The shorter write time interval reduces the overall write operation time, improving memory device performance.


Original Abstract Submitted

A semiconductor memory device includes a memory cell array, a row hammer management circuit and a control logic circuit. The memory cell array includes a plurality of memory cell rows. The row hammer management circuit counts the number of instances of access of each of the memory cell rows, such as in response to the receipt of an active command, to store the counted values in count cells of each of the memory cell rows as count data and, in response to a first command, initiates an internal read-update-write operation to read the count data, to update the read count data, and to write the updated count data in the count cells. The control logic circuit may performs an internal write operation to write the updated count data in the count cells during a second write time interval that is smaller than a first write time interval associated with a normal write operation.

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