18074007. SEMICONDUCTOR PACKAGES AND METHOD OF MANUFACTURING THE SAME simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
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SEMICONDUCTOR PACKAGES AND METHOD OF MANUFACTURING THE SAME
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SEMICONDUCTOR PACKAGES AND METHOD OF MANUFACTURING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 18074007 titled 'SEMICONDUCTOR PACKAGES AND METHOD OF MANUFACTURING THE SAME
Simplified Explanation
The semiconductor package described in this patent application includes several components such as redistribution layers, a semiconductor chip, a molding layer, and a connecting pillar. Here is a simplified explanation of the abstract:
- The semiconductor package consists of a first redistribution layer, which is a layer that redistributes the electrical connections on the chip to a different layout.
- A first semiconductor chip is placed on top of the first redistribution layer.
- A molding layer is then applied to cover the side surface of the first semiconductor chip, providing protection and insulation.
- A second redistribution layer is placed on top of the molding layer, providing additional electrical connections.
- A connecting pillar is inserted through the molding layer, connecting the first redistribution layer to the second redistribution layer.
- The connecting pillar has a lower area with a certain width and an upper area with a narrower width, both in parallel to the upper surface of the semiconductor chip.
Potential applications of this technology:
- Semiconductor packaging for various electronic devices such as smartphones, tablets, computers, and IoT devices.
- Integrated circuits used in automotive electronics, medical devices, and industrial equipment.
Problems solved by this technology:
- Provides a compact and efficient way to connect the redistribution layers in a semiconductor package.
- Offers improved electrical connectivity and signal transmission between different layers.
- Enhances the overall performance and reliability of the semiconductor package.
Benefits of this technology:
- Enables higher density packaging of semiconductor chips, allowing for more functionality in smaller devices.
- Reduces the size and weight of electronic devices, making them more portable and convenient.
- Enhances the electrical performance and reliability of the semiconductor package, leading to improved device performance and longevity.
Original Abstract Submitted
A semiconductor package is provided. The semiconductor package includes a first redistribution layer, a first semiconductor chip disposed on the first redistribution layer, a molding layer disposed on the first redistribution layer to cover a side surface of the first semiconductor chip, a second redistribution layer disposed on the molding layer, and a connecting pillar disposed to penetrate the molding layer and configured to connect the first redistribution layer to the second redistribution layer, the connecting pillar including a lower area having a first width in a first direction parallel to an upper surface of the first semiconductor chip and an upper area integrally connected to the lower area and having a second width that is less than the first width in the first direction.
