18072784. SEMICONDUCTOR DEVICES HAVING SPACER STRUCTURES simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
SEMICONDUCTOR DEVICES HAVING SPACER STRUCTURES
Organization Name
Inventor(s)
Gyuhyun Kil of Hwaseong-si (KR)
Chansic Yoon of Anyang-si (KR)
Junghoon Han of Hwaseong-si (KR)
SEMICONDUCTOR DEVICES HAVING SPACER STRUCTURES - A simplified explanation of the abstract
This abstract first appeared for US patent application 18072784 titled 'SEMICONDUCTOR DEVICES HAVING SPACER STRUCTURES
Simplified Explanation
The abstract describes a semiconductor device that includes various layers and structures to improve its performance. Here are the key points:
- The device has a substrate and a gate dielectric layer on top of it.
- The gate dielectric layer has a recess on one of its side surfaces.
- A gate electrode structure is placed on the gate dielectric layer.
- A gate capping layer is added on top of the gate electrode structure.
- A spacer structure is formed on the substrate, covering the side surfaces of the gate dielectric layer, gate electrode structure, and gate capping layer.
- The spacer structure consists of three layers: a first spacer, a second spacer on top of the first spacer, and a third spacer on top of the second spacer.
- Both the second and third spacers are made of silicon nitride.
Potential applications of this technology:
- This semiconductor device can be used in various electronic devices such as smartphones, computers, and tablets.
- It can be utilized in the manufacturing of integrated circuits and microprocessors.
Problems solved by this technology:
- The recess in the gate dielectric layer helps to improve the performance and efficiency of the semiconductor device.
- The spacer structure provides better control over the electrical properties of the device.
Benefits of this technology:
- The improved performance and efficiency of the semiconductor device can lead to faster and more reliable electronic devices.
- The better control over electrical properties allows for more precise tuning and optimization of the device's performance.
Original Abstract Submitted
A semiconductor device includes a substrate, a gate dielectric layer on the substrate, the gate dielectric layer including a recess at a side surface thereof, a gate electrode structure on the gate dielectric layer, a gate capping layer on the gate electrode structure, and a spacer structure on the substrate and covering side surfaces of the gate dielectric layer, the gate electrode structure, and the gate capping layer, the spacer structure including a first spacer, a second spacer on the first spacer and covering the recess, and a third spacer on the second spacer, the second spacer and the third spacer including silicon nitride.
