18071168. VERTICAL FIELD EFFECT TRANSISTOR (VFET) STRUCTURE WITH DIELECTRIC PROTECTION LAYER AND METHOD OF MANUFACTURING THE SAME simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

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VERTICAL FIELD EFFECT TRANSISTOR (VFET) STRUCTURE WITH DIELECTRIC PROTECTION LAYER AND METHOD OF MANUFACTURING THE SAME

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

Hwi Chan Jun of Yongin-si (KR)

Min Gyu Kim of Hwaseong-si (KR)

Gil-Hwan Son of Yongin-si (KR)

VERTICAL FIELD EFFECT TRANSISTOR (VFET) STRUCTURE WITH DIELECTRIC PROTECTION LAYER AND METHOD OF MANUFACTURING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 18071168 titled 'VERTICAL FIELD EFFECT TRANSISTOR (VFET) STRUCTURE WITH DIELECTRIC PROTECTION LAYER AND METHOD OF MANUFACTURING THE SAME

Simplified Explanation

The abstract describes a patent application for a vertical field effect transistor (VFET) device and a method of manufacturing it. Here are the key points:

  • The method involves providing an intermediate VFET structure with a substrate, fin structures, gate structures, and bottom epitaxial layers.
  • Interlayer dielectric (ILD) layers are filled between and at the sides of the gate structures.
  • An ILD protection layer is formed on the ILD layers, consisting of upper and lower portions, to prevent oxide loss.
  • The fin structures, gate structures, and ILD protection layer above the lower portion are removed.
  • The masks of the fin structures and top portions of the gate structures are also removed, resulting in lower top surfaces for the fin and gate structures compared to the ILD layers.
  • Top spacers are formed on the gate structures, and top epitaxial layers are formed on the fin structures.
  • A contact structure is then created to connect to the top epitaxial layers.

Potential applications of this technology:

  • Vertical field effect transistors can be used in various electronic devices, such as smartphones, computers, and televisions.
  • The method described in the patent application can improve the performance and efficiency of VFET devices.

Problems solved by this technology:

  • The method addresses the issue of oxide loss in the ILD layers, which can affect the performance and reliability of VFET devices.
  • By providing an ILD protection layer, the patent application aims to prevent oxide loss and enhance the overall functionality of the VFET device.

Benefits of this technology:

  • The manufacturing method described in the patent application can simplify the production process of VFET devices.
  • The use of an ILD protection layer helps to improve the reliability and performance of the VFET device.
  • The resulting VFET device can have enhanced efficiency and functionality compared to existing designs.


Original Abstract Submitted

A vertical field effect transistor (VFET) device and a method of manufacturing the same are provided. The method includes: (a) providing an intermediate VFET structure comprising a substrate, and fin structures, gate structures and bottom epitaxial layers on the substrate, the gate structures being formed on the fin structures, respectively, each fin structure comprising a fin and a mask thereon, and the bottom epitaxial layers; (b) filling interlayer dielectric (ILD) layers between and at sides of the gate structures; (c) forming an ILD protection layer on the ILD layers, respectively, the ILD protection layer having upper portions and lower portions, and comprising a material preventing oxide loss at the ILD layers; (d) removing the fin structures, the gate structures and the ILD protection layer above the lower portion of the ILD protection layer; (e) removing the masks of the fin structures and top portions of the gate structures so that top surfaces of the fin structures and top surfaces of the gate structures after the removing are lower than top surfaces of the ILD layers; (f) forming top spacers on the gate structures of which the top portions are removed, and top epitaxial layers on the fin structures of which the masks are removed; and (g) forming a contact structure connected to the top epitaxial layers.