18064002. STORAGE DEVICE AND STORAGE SYSTEM INCLUDING THE SAME simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
STORAGE DEVICE AND STORAGE SYSTEM INCLUDING THE SAME
Organization Name
Inventor(s)
Yongwoo Jeong of Suwon-si (KR)
Dongwoo Nam of Seongnam-si (KR)
Myungsub Shin of Suwon-si (KR)
Hyunkyu Jang of Hwaseong-si (KR)
STORAGE DEVICE AND STORAGE SYSTEM INCLUDING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 18064002 titled 'STORAGE DEVICE AND STORAGE SYSTEM INCLUDING THE SAME
Simplified Explanation
The abstract describes a storage device and system that includes a reference clock pin, a reference clock frequency determination circuitry, and a device controller circuitry. The device is capable of receiving a reference clock signal from a host, determining the reference clock frequency, and performing a high-speed mode link startup between the host and the storage device based on the reference clock frequency.
- The storage device includes a reference clock pin to receive a reference clock signal from a host.
- A reference clock frequency determination circuitry is present to determine the reference clock frequency from the received signal.
- A device controller circuitry is configured to initiate a high-speed mode link startup between the host and the storage device based on the determined reference clock frequency.
Potential Applications
- Data storage systems
- Computer servers
- Network storage devices
Problems Solved
- Ensures accurate synchronization between the host and the storage device
- Facilitates high-speed data transfer between the host and the storage device
Benefits
- Improved performance and efficiency in data transfer
- Enhanced reliability and accuracy in synchronization between the host and the storage device
- Enables faster startup and operation of the storage device
Original Abstract Submitted
A storage device and a storage system including the same are provided. The storage device includes a reference clock pin configured to receive a reference clock signal from a host, a reference clock frequency determination circuitry configured to determine a reference clock frequency from the reference clock signal received through the reference clock pin, and a device controller circuitry configured to perform a high speed mode link startup between the host and the storage device according to the reference clock frequency.
