18060884. SEMICONDUCTOR MEMORY DEVICE INCLUDING CHALCOGENIDE simplified abstract (SK hynix Inc.)

SEMICONDUCTOR MEMORY DEVICE INCLUDING CHALCOGENIDE

Organization Name

SK hynix Inc.

Inventor(s)

Jong Ho Lee of Icheon (KR)

Jun Ku Ahn of Icheon (KR)

Gwang Sun Jung of Icheon (KR)

Uk Hwang of Icheon (KR)

SEMICONDUCTOR MEMORY DEVICE INCLUDING CHALCOGENIDE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18060884 titled 'SEMICONDUCTOR MEMORY DEVICE INCLUDING CHALCOGENIDE

Simplified Explanation

Abstract: A semiconductor memory device is described that includes a memory cell with a chalcogenide layer composed of three or more components. The memory cell is positioned between a first electrode and a second electrode. The device also includes a peripheral circuit that provides the memory cell with a program pulse, which induces a compositional gradient in the chalcogenide layer.

Patent/Innovation Explanation:

• The semiconductor memory device includes a memory cell with a chalcogenide layer composed of three or more components.
• The memory cell is positioned between a first electrode and a second electrode.
• A peripheral circuit is included in the device to provide the memory cell with a program pulse.
• The program pulse induces a compositional gradient in the chalcogenide layer.

Potential Applications:

• This technology can be used in various memory devices, such as non-volatile memory (NVM) devices.
• It can be applied in computer systems, smartphones, tablets, and other electronic devices that require memory storage.

Problems Solved:

• The technology addresses the need for improved memory devices with enhanced performance and reliability.
• It solves the problem of achieving a compositional gradient in the chalcogenide layer of a memory cell.

Benefits of this Technology:

• The use of a chalcogenide layer with three or more components improves the performance and reliability of the memory device.
• The induced compositional gradient in the chalcogenide layer enhances the functionality and efficiency of the memory cell.
• The technology enables faster and more efficient data storage and retrieval in electronic devices.

Original Abstract Submitted

A semiconductor memory device includes a memory cell interposed between a first electrode and a second electrode, and configured with a chalcogenide layer that includes three or more components, and a peripheral circuit for providing the memory cell with a program pulse inducing a compositional gradient in the chalcogenide layer.