18060853. Semiconductor Package with Multiple Redistribution Substrates simplified abstract (Samsung Electronics Co., Ltd.)

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Semiconductor Package with Multiple Redistribution Substrates

Organization Name

Samsung Electronics Co., Ltd.

Inventor(s)

Hyeonjeong Hwang of Cheonan-si (KR)

Kyoung Lim Suk of Suwon-si (KR)

Seokhyun Lee of Hwaseong-si (KR)

Jaegwon Jang of Hwaseong-si (KR)

Semiconductor Package with Multiple Redistribution Substrates - A simplified explanation of the abstract

This abstract first appeared for US patent application 18060853 titled 'Semiconductor Package with Multiple Redistribution Substrates

Simplified Explanation

The patent application describes a semiconductor package that includes multiple layers and substrates to protect and connect a semiconductor chip. Here are the key points:

  • The package includes a first redistribution substrate, which is a layer that redistributes the electrical connections on the chip to a different layout.
  • A first semiconductor chip is mounted on the first redistribution substrate.
  • A first molding layer is applied on top of the first redistribution substrate and covers the top surface and sides of the semiconductor chip, providing protection.
  • A second redistribution substrate is placed on top of the first molding layer, providing additional electrical connections.
  • An adhesive film is placed between the second redistribution substrate and the first molding layer, creating a bond between the two layers.
  • The adhesive film is positioned away from the semiconductor chip and covers the top surface of the first molding layer.
  • The lateral surface of the adhesive film is aligned with the lateral surface of the second redistribution substrate.

Potential applications of this technology:

  • Semiconductor packaging for various electronic devices such as smartphones, tablets, computers, and IoT devices.
  • Integrated circuits used in automotive electronics, medical devices, and industrial equipment.

Problems solved by this technology:

  • Provides a protective layer for the semiconductor chip, preventing damage from external factors such as moisture, dust, and physical impact.
  • Enables efficient redistribution of electrical connections, allowing for a more compact and optimized layout.
  • Ensures a reliable bond between the different layers, enhancing the overall durability and performance of the semiconductor package.

Benefits of this technology:

  • Improved reliability and durability of semiconductor packages, leading to longer lifespan and reduced failure rates.
  • Enables smaller and more compact designs, allowing for more efficient use of space in electronic devices.
  • Enhances the electrical performance of the semiconductor package by optimizing the redistribution of connections.


Original Abstract Submitted

A semiconductor package includes a first redistribution substrate, a first semiconductor chip mounted on the first redistribution substrate, a first molding layer on the first redistribution substrate and covering a top surface and lateral surfaces of the first semiconductor chip, a second redistribution substrate on the first molding layer, and an adhesive film between the second redistribution substrate and the first molding layer. The adhesive film is spaced apart from the first semiconductor chip and covers a top surface of the first molding layer. A lateral surface of the adhesive film is coplanar with a lateral surface of the second redistribution substrate.