18052726. INTEGRATED CIRCUIT DEVICE simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

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INTEGRATED CIRCUIT DEVICE

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

Jangeun Lee of Hwaseong-si (KR)

Minjoo Lee of Anyang-si (KR)

Eunyoung Lee of Hwaseong-si (KR)

Minsik Kim of Suwon-si (KR)

INTEGRATED CIRCUIT DEVICE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18052726 titled 'INTEGRATED CIRCUIT DEVICE

Simplified Explanation

The abstract describes an integrated circuit device that includes gate structures embedded in a substrate, a direct contact between the gate structures, and a bit line electrode layer on the direct contact. The bit line electrode layer is made of a molybdenum tungsten (MoW) alloy with a thickness of 10 nm to 30 nm.

  • The integrated circuit device has gate structures embedded in a substrate.
  • There is a direct contact between the gate structures.
  • A bit line electrode layer is present on the direct contact.
  • The bit line electrode layer is made of a molybdenum tungsten (MoW) alloy.
  • The thickness of the bit line electrode layer is between 10 nm and 30 nm.

Potential applications of this technology:

  • Integrated circuits in electronic devices such as smartphones, tablets, and computers.
  • Memory devices, such as flash memory or DRAM.
  • Microprocessors and other high-performance computing components.

Problems solved by this technology:

  • Provides a reliable and efficient connection between gate structures in an integrated circuit.
  • Enables the fabrication of smaller and more compact integrated circuits.
  • Improves the performance and functionality of electronic devices.

Benefits of this technology:

  • Enhanced integration and miniaturization of electronic components.
  • Improved performance and speed of integrated circuits.
  • Increased reliability and durability of electronic devices.


Original Abstract Submitted

An integrated circuit device according may include a plurality of gate structures embedded in a substrate, a direct contact on the substrate between the plurality of gate structures, and a bit line electrode layer on the direct contact. The bit line electrode layer has a thickness of about 10 nm to 30 nm. The bit line electrode layer may include a molybdenum tungsten (MoW) alloy including molybdenum (Mo) a range of about 25 at % to about 75 at %.