18045541. NONVOLATILE MEMORY DEVICE HAVING MULTI-STACK MEMORY BLOCK AND METHOD OF OPERATING THE SAME simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
NONVOLATILE MEMORY DEVICE HAVING MULTI-STACK MEMORY BLOCK AND METHOD OF OPERATING THE SAME
Organization Name
Inventor(s)
YONGHYUK Choi of SUWON-SI (KR)
NONVOLATILE MEMORY DEVICE HAVING MULTI-STACK MEMORY BLOCK AND METHOD OF OPERATING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 18045541 titled 'NONVOLATILE MEMORY DEVICE HAVING MULTI-STACK MEMORY BLOCK AND METHOD OF OPERATING THE SAME
Simplified Explanation
The abstract describes a nonvolatile memory device with a multi-stack memory block. Here are the key points:
- The memory device has a memory cell array divided into multiple memory stacks arranged vertically.
- A control circuit is present to perform a channel voltage equalization operation on the memory stacks.
- Inter-stack portions are located between the memory stacks, and there is a channel hole passing through the word lines of each memory stack.
- The control circuit identifies certain word lines adjacent to the inter-stack portions as inter-stack word lines.
- The control circuit adjusts the timing for applying a pass voltage or a ground voltage to the inter-stack word lines based on the size of the channel hole of each inter-stack word line.
Potential applications of this technology:
- Nonvolatile memory devices are widely used in various electronic devices, such as smartphones, tablets, laptops, and solid-state drives (SSDs).
- This technology can improve the performance and reliability of nonvolatile memory devices, leading to better overall performance of electronic devices.
Problems solved by this technology:
- Nonvolatile memory devices often face challenges related to voltage distribution and channel hole size variations, which can impact their performance and reliability.
- This technology addresses these challenges by equalizing the channel voltage across multiple memory stacks and adjusting the timing for applying voltages to inter-stack word lines based on their channel hole sizes.
Benefits of this technology:
- Improved performance: By equalizing the channel voltage and optimizing the timing for voltage application, the memory device can operate more efficiently and deliver faster read and write speeds.
- Enhanced reliability: The control circuit ensures that the inter-stack word lines receive the appropriate voltages based on their channel hole sizes, reducing the risk of errors and improving the overall reliability of the memory device.
- Cost-effective: By improving performance and reliability, this technology can extend the lifespan of nonvolatile memory devices, reducing the need for frequent replacements and lowering costs for both manufacturers and consumers.
Original Abstract Submitted
A nonvolatile memory device having a multi-stack memory block includes: a memory cell array divided into a plurality of memory stacks disposed in a vertical direction; and a control circuit configured to perform a channel voltage equalization operation of the plurality of memory stacks, wherein inter-stack portions are between the plurality of memory stacks, and a channel hole passes through the word lines of each of the plurality of memory stacks. The control circuit determines, as inter-stack word lines, some word lines adjacent to the inter-stack portions among the word lines of each of the plurality of memory stacks and differently controls setup time points for applying a pass voltage, or recovery time points for applying a ground voltage, to the inter-stack word lines, according to sizes of the channel hole of the inter-stack word lines.
