17986448. WIDE SCANNING PATCH ANTENNA ARRAY simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
WIDE SCANNING PATCH ANTENNA ARRAY
Organization Name
Inventor(s)
Mikhail Nikolaevich Makurin of Moscow (RU)
Elena Aleksandrovna Shepeleva of Moscow (RU)
WIDE SCANNING PATCH ANTENNA ARRAY - A simplified explanation of the abstract
This abstract first appeared for US patent application 17986448 titled 'WIDE SCANNING PATCH ANTENNA ARRAY
Simplified Explanation
The patent application describes a wide scanning antenna array that aims to increase the beam scanning range, simplify the design, and reduce losses. The antenna array includes multiple elements, each consisting of a main printed circuit board (PCB), a middle layer, and an additional PCB.
- The antenna array elements are designed with a cavity in the middle layer to minimize coupling between elements and improve performance.
- The cavity includes a hole that allows coupling between the main and additional PCBs.
- The main PCB, middle layer, and additional PCB are interconnected using a no galvanic connection, which simplifies the design and reduces losses.
Potential applications of this technology:
- Wireless communication systems
- Radar systems
- Satellite communication systems
- Mobile devices with improved antenna performance
Problems solved by this technology:
- Limited beam scanning range of antenna arrays
- Complex and bulky antenna array designs
- High losses and interference between antenna elements
Benefits of this technology:
- Increased beam scanning range
- Simplified antenna array design
- Reduced losses and improved performance
- Enhanced efficiency and reliability of wireless communication systems
Original Abstract Submitted
The disclosure relates to a wide scanning antenna array. The technical result consists in increasing the beam scanning range of the antenna array and the operating frequency range, simplifying the design of the antenna array and reducing losses. An antenna array is provided. The antenna array includes a plurality of antenna array elements. Each antenna array element of the plurality of antenna array elements includes a main printed circuit board (PCB) over which a middle layer and an additional PCB are arranged. A first patch element is disposed at the main PCB, and a second patch element is disposed at the additional PCB. The antenna array element further includes a cavity in the middle layer to reduce coupling between the antenna array element and at least another antenna array element of the plurality of antenna array elements. The cavity in the middle layer includes a hole that supports coupling between the first patch element and the second patch element. The main PCB, the middle layer and the additional PCB are interconnected by means of a no galvanic connection.
