17984417. INTEGRATED CIRCUIT AND METHOD OF MANUFACTURING THE SAME simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
INTEGRATED CIRCUIT AND METHOD OF MANUFACTURING THE SAME
Organization Name
Inventor(s)
Hyeongyu You of Hwaseong-si (KR)
Sangdo Park of Seongnam-si (KR)
Minjae Jeong of Hwaseong-si (KR)
INTEGRATED CIRCUIT AND METHOD OF MANUFACTURING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 17984417 titled 'INTEGRATED CIRCUIT AND METHOD OF MANUFACTURING THE SAME
Simplified Explanation
The abstract describes an integrated circuit with stacked metal layers and a method of manufacturing it. The method involves providing standard cells with cell patterns on multiple metal layers and forming an additional pattern on a specific metal layer between adjacent patterns on a particular track. This is done when the interval between the adjacent patterns exceeds a reference value.
- The integrated circuit includes multiple stacked metal layers.
- Standard cells are used, each with cell patterns on the metal layers.
- An additional pattern is formed on a specific metal layer between adjacent patterns on a particular track.
- This is done when the interval between the adjacent patterns exceeds a reference value.
Potential Applications
- This technology can be applied in the manufacturing of integrated circuits.
- It can be used in various electronic devices such as smartphones, computers, and IoT devices.
- The method allows for more efficient use of space on the metal layers, enabling higher density and performance in integrated circuits.
Problems Solved
- The method solves the problem of optimizing space utilization on metal layers in integrated circuits.
- It addresses the challenge of maintaining proper spacing between patterns on different tracks.
- By adding an additional pattern when the interval exceeds a reference value, it ensures proper functionality and performance of the integrated circuit.
Benefits
- The use of stacked metal layers allows for increased density and functionality in integrated circuits.
- The method optimizes space utilization, resulting in more efficient and compact designs.
- By maintaining proper spacing between patterns, the integrated circuit's performance and reliability are improved.
Original Abstract Submitted
An integrated circuit including a plurality of stacked metal layers and a method of manufacturing the integrated circuit are provided. The method includes: providing a plurality of standard cells, each of which includes cell patterns respectively formed on the plurality of metal layers; and forming, on a particular metal layer among the plurality of metal layers which includes patterns extending in a first direction that are respectively formed on a plurality of tracks that are spaced apart from each other in a second direction, an additional pattern between adjacent patterns formed on a particular track of the plurality of tracks based on an interval between the adjacent patterns exceeding a reference value.
