17980541. HYBRID-SPARSE NPU WITH FINE-GRAINED STRUCTURED SPARSITY simplified abstract (Samsung Electronics Co., Ltd.)
Contents
- 1 HYBRID-SPARSE NPU WITH FINE-GRAINED STRUCTURED SPARSITY
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 HYBRID-SPARSE NPU WITH FINE-GRAINED STRUCTURED SPARSITY - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Unanswered Questions
- 1.11 Original Abstract Submitted
HYBRID-SPARSE NPU WITH FINE-GRAINED STRUCTURED SPARSITY
Organization Name
Inventor(s)
Jong Hoon Shin of San Jose CA (US)
Ardavan Pedram of Santa Clara CA (US)
Joseph Hassoun of Los Gatos CA (US)
HYBRID-SPARSE NPU WITH FINE-GRAINED STRUCTURED SPARSITY - A simplified explanation of the abstract
This abstract first appeared for US patent application 17980541 titled 'HYBRID-SPARSE NPU WITH FINE-GRAINED STRUCTURED SPARSITY
Simplified Explanation
The abstract describes a neural processing unit that supports dual-sparsity modes, with a weight buffer storing weight values in either a structured weight sparsity arrangement or a random weight sparsity arrangement. The unit includes a weight multiplexer array, an activation buffer, an activation multiplexer array, and a multiplier array to perform operations on weight and activation values.
- Weight buffer stores weight values in structured or random sparsity arrangement.
- Weight multiplexer array outputs weight values based on selected sparsity arrangement.
- Activation buffer stores activation values.
- Activation multiplexer array outputs activation values as second operand values.
- Multiplier array calculates product values for each operand value pair.
Potential Applications
This technology could be applied in various fields such as artificial intelligence, machine learning, robotics, and data processing.
Problems Solved
1. Efficient processing of neural networks with dual-sparsity modes. 2. Optimized utilization of weight and activation values for neural computations.
Benefits
1. Improved performance and speed in neural network operations. 2. Enhanced flexibility in handling different sparsity arrangements. 3. Reduced memory and computational requirements.
Potential Commercial Applications
Optimized neural network processors for AI applications.
Possible Prior Art
There may be prior art related to neural processing units with sparsity support, but specific examples are not provided in this abstract.
Unanswered Questions
How does this technology compare to existing neural processing units in terms of efficiency and performance?
The abstract does not provide a direct comparison with existing technologies in the field.
What are the specific use cases where dual-sparsity modes would be most beneficial?
The abstract does not mention specific use cases or scenarios where dual-sparsity modes would provide the most significant advantages.
Original Abstract Submitted
A neural processing unit is disclosed that supports dual-sparsity modes. A weight buffer is configured to store weight values in an arrangement selected from a structured weight sparsity arrangement or a random weight sparsity arrangement. A weight multiplexer array is configured to output one or more weight values stored in the weight buffer as first operand values based on the selected weight sparsity arrangement. An activation buffer is configured to store activation values. An activation multiplexer array includes inputs to the activation multiplexer array that are coupled to the activation buffer, and is configured to output one or more activation values stored in the activation buffer as second operand values in which each respective second operand value and a corresponding first operand value forming an operand value pair. A multiplier array is configured to output a product value for each operand value pair.
