17977575. MULTI-STACK NANOSHEET STRUCTURE INCLUDING SEMICONDUCTOR DEVICE simplified abstract (Samsung Electronics Co., Ltd.)

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MULTI-STACK NANOSHEET STRUCTURE INCLUDING SEMICONDUCTOR DEVICE

Organization Name

Samsung Electronics Co., Ltd.

Inventor(s)

Byounghak Hong of Albany NY (US)

Seungchan Yun of Waterford NY (US)

Jaehong Lee of Albany NY (US)

Kang-ill Seo of Albany NY (US)

MULTI-STACK NANOSHEET STRUCTURE INCLUDING SEMICONDUCTOR DEVICE - A simplified explanation of the abstract

This abstract first appeared for US patent application 17977575 titled 'MULTI-STACK NANOSHEET STRUCTURE INCLUDING SEMICONDUCTOR DEVICE

Simplified Explanation

The abstract describes a multi-stack nanosheet structure that includes at least a first nanosheet structure and a second nanosheet structure, separated from each other. The structure also includes a channel structure with three portions - one on the first nanosheet structure, one on the second nanosheet structure, and one on the substrate between them. A gate structure is present between the first and second portions of the channel structure, and it includes a gate dielectric layer made of oxide. Additionally, there are source/drain regions on both the first and second nanosheet structures, which can be doped with either n-type or p-type dopants.

  • The structure consists of multiple nanosheet layers stacked on top of each other.
  • The nanosheet layers are separated from each other and adjacent to each other.
  • The structure includes a continuous channel structure with three portions - one on each nanosheet layer and one on the substrate between them.
  • A gate structure is present on the substrate between the nanosheet layers.
  • The gate structure includes a gate dielectric layer made of oxide.
  • Source/drain regions are present on each nanosheet layer.
  • The source/drain regions can be doped with either n-type or p-type dopants.

Potential applications of this technology:

  • This multi-stack nanosheet structure can be used in the fabrication of advanced transistors for electronic devices.
  • It can enable the development of more efficient and compact integrated circuits.
  • The structure may find applications in the semiconductor industry for improving the performance of electronic devices.

Problems solved by this technology:

  • The multi-stack nanosheet structure addresses the need for higher performance and energy-efficient transistors.
  • It helps overcome the limitations of traditional transistor designs by providing better control over the flow of current.

Benefits of this technology:

  • Improved performance: The structure allows for better control of current flow, leading to enhanced transistor performance.
  • Energy efficiency: The design enables lower power consumption, contributing to energy-efficient electronic devices.
  • Compact size: The multi-stack nanosheet structure allows for a more compact and dense integration of transistors, enabling smaller and more portable electronic devices.


Original Abstract Submitted

Provided is a multi-stack nanosheet structure that includes: at least a first nanosheet structure and at least a second nanosheet structure, above the substrate, separated from each other, wherein the first nanosheet structure and second nanosheet structure are adjacent to each other; a channel structure comprising a first portion on the first nanosheet structure, a second portion on the second nanosheet structure, and a third portion on the substrate between the first and second portions, wherein the first portion, the second portion and the third portion form a single continuous structure; a gate structure between the first and second portions on the third portion of the channel structure, wherein the gate structure comprises a gate dielectric layer comprising oxide; and at least a first source/drain region on the first nanosheet structure, and at least a second source/drain region on the second nanosheet structure, wherein the first source/drain region and the second source/drain region include an n-type or p-type dopant.