17977100. SEMICONDUCTOR PACKAGE simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
SEMICONDUCTOR PACKAGE
Organization Name
Inventor(s)
Younglyong Kim of Anyang-si (KR)
Hyunsoo Chung of Hwaseong-si (KR)
SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract
This abstract first appeared for US patent application 17977100 titled 'SEMICONDUCTOR PACKAGE
Simplified Explanation
The patent application describes a semiconductor package that includes a package substrate, semiconductor chips, and a conductive connection member. The semiconductor chips have a chip body, a chip pad, and oxide layers.
- The semiconductor package includes a package substrate, substrate adhesive member, semiconductor chips, and a conductive connection member.
- The semiconductor chips are stacked on the substrate adhesive member and include first and second semiconductor chips.
- Each semiconductor chip has a chip body, chip pad, upper oxide layer, and lower oxide layer.
- The upper oxide layer is made of a first material and covers the upper surface of the chip body, exposing a portion of the chip pad.
- The lower oxide layer is made of a second material and covers the lower surface of the chip body.
- The first semiconductor chip has an oxide bonding region between the first and second materials in contact with the lower oxide layer of the second semiconductor chip.
Potential applications of this technology:
- Semiconductor packaging industry
- Electronics manufacturing industry
Problems solved by this technology:
- Improved bonding between semiconductor chips
- Enhanced reliability and performance of semiconductor packages
Benefits of this technology:
- Simplified semiconductor package design
- Increased efficiency in manufacturing processes
- Improved overall performance and reliability of electronic devices.
Original Abstract Submitted
The semiconductor package, includes: a package substrate; a substrate adhesive member on the package substrate; a plurality of semiconductor chips stacked on the substrate adhesive member and including first and second semiconductor chips; and a conductive connection member connecting the package substrate and the semiconductor chips, each of the semiconductor chips including a semiconductor chip body, a chip pad, an upper oxide layer comprised of a first material and covering an upper surface of the semiconductor chip body and exposing a portion of an upper surface of the chip pad, and a lower oxide layer comprised of a second material and covering a lower surface of the semiconductor chip body, wherein the upper oxide layer of the first semiconductor chip has an oxide bonding region between the first material and the second material in a first region in contact with the lower oxide layer of the second semiconductor chip.
