17973514. ENHANCED MASK PATTERN-AWARE HEURISTICS FOR OPTICAL PROXIMITY CORRECTIONS FOR INTEGRATED CIRCUITS simplified abstract (Intel Corporation)

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ENHANCED MASK PATTERN-AWARE HEURISTICS FOR OPTICAL PROXIMITY CORRECTIONS FOR INTEGRATED CIRCUITS

Organization Name

Intel Corporation

Inventor(s)

Timothy C. Johnston of Sacramento CA (US)

Seongtae Jeong of Portland OR (US)

Talha Khan of HIllsboro OR (US)

Anjan Raghunathan of Portland OR (US)

ENHANCED MASK PATTERN-AWARE HEURISTICS FOR OPTICAL PROXIMITY CORRECTIONS FOR INTEGRATED CIRCUITS - A simplified explanation of the abstract

This abstract first appeared for US patent application 17973514 titled 'ENHANCED MASK PATTERN-AWARE HEURISTICS FOR OPTICAL PROXIMITY CORRECTIONS FOR INTEGRATED CIRCUITS

Simplified Explanation

The patent application describes a method for optical proximity corrections to an integrated circuit photomask, including predicting contours of adjacent polygons and generating minimum distances between them based on corner rounding.

  • Identifying contours of adjacent polygons: The method involves identifying contours of adjacent polygons on a photomask that are predicted for polygons of an integrated circuit.
  • Generating fast contour prediction: A fast contour prediction is generated based on the corner rounding associated with the identified contours of adjacent polygons.
  • Generating minimum distance: Based on the fast contour prediction, a minimum distance is generated between the identified contours of adjacent polygons, which is associated with the optical proximity corrections.

Potential Applications

This technology can be applied in the semiconductor industry for improving the accuracy of photomasks used in the manufacturing of integrated circuits.

Problems Solved

This technology helps in reducing errors and improving the precision of optical proximity corrections on integrated circuit photomasks, leading to enhanced performance of the final semiconductor devices.

Benefits

The benefits of this technology include increased efficiency in the production of integrated circuits, higher accuracy in pattern transfer, and overall improved quality of semiconductor devices.

Potential Commercial Applications

The potential commercial applications of this technology can be seen in semiconductor manufacturing companies, photomask production facilities, and other industries involved in the fabrication of integrated circuits.

Possible Prior Art

One possible prior art in this field could be the use of traditional optical proximity correction methods in semiconductor manufacturing to improve the accuracy of photomasks and enhance the quality of integrated circuits.

Unanswered Questions

How does this technology compare to existing optical proximity correction methods in terms of accuracy and efficiency?

This article does not provide a direct comparison between this technology and existing optical proximity correction methods in terms of accuracy and efficiency. Further research or testing may be needed to determine the specific advantages of this innovation over traditional methods.

What are the potential limitations or challenges in implementing this technology on a large scale in semiconductor manufacturing facilities?

The article does not address the potential limitations or challenges in implementing this technology on a large scale in semiconductor manufacturing facilities. Factors such as cost, compatibility with existing systems, and training requirements for personnel could be important considerations that need to be explored further.


Original Abstract Submitted

This disclosure describes systems, methods, and devices related to optical proximity corrections to an integrated circuit photomask. A method may include identifying a first contour of a first adjacent polygon of a photomask predicted for a first polygon of an integrated circuit, the first contour excluding a first corner formed by a first edge and a second edge of the first polygon; identifying a second contour of a second adjacent polygon of a photomask predicted for a second polygon of the integrated circuit, the second contour excluding a second corner formed by a third edge and a fourth edge of the second polygon; generating a fast contour prediction based on corner rounding associated with the first contour and the second contour; and generating, based on the fast contour prediction, a minimum distance between the first contour and the second contour, the minimum distance associated with the optical proximity corrections.