17972300. NON-VOLATILE MEMORY DEVICE FOR DETECTING DEFECTS OF BIT LINES AND WORD LINES simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

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NON-VOLATILE MEMORY DEVICE FOR DETECTING DEFECTS OF BIT LINES AND WORD LINES

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

Junyoung Ko of Suwon-si (KR)

Sangwan Nam of Suwon-si (KR)

Youse Kim of Suwon-si (KR)

Heewon Kim of Suwon-si (KR)

NON-VOLATILE MEMORY DEVICE FOR DETECTING DEFECTS OF BIT LINES AND WORD LINES - A simplified explanation of the abstract

This abstract first appeared for US patent application 17972300 titled 'NON-VOLATILE MEMORY DEVICE FOR DETECTING DEFECTS OF BIT LINES AND WORD LINES

Simplified Explanation

The abstract describes a non-volatile memory device that includes a memory cell array, a page buffer circuit, a control logic circuit, and a defect detection circuit.

  • The memory cell array consists of cell strings, each containing memory cells connected to word lines.
  • The page buffer circuit has page buffers connected to the memory cells through bit lines, with the first page buffer connected to a first cell string through a first bit line.
  • The control logic circuit controls a pre-sensing operation, where the first bit line and the first cell string are disconnected during a pre-sensing period to detect defects in the first bit line. It also controls a post-sensing operation, where the first bit line and the first cell string are connected in a post-sensing period to detect defects in the word lines and the first bit line.
  • The defect detection circuit is responsible for detecting defects in the word lines based on the sensing operations.

Potential applications of this technology:

  • Non-volatile memory devices, such as flash memory, used in various electronic devices like smartphones, tablets, and computers.
  • Storage devices requiring high reliability and defect detection capabilities.

Problems solved by this technology:

  • Detecting defects in the bit lines and word lines of non-volatile memory devices.
  • Improving the reliability and performance of memory devices by identifying and addressing potential defects.

Benefits of this technology:

  • Enhanced defect detection capabilities, leading to improved reliability and performance of non-volatile memory devices.
  • Efficient control of pre-sensing and post-sensing operations, allowing for accurate defect detection.
  • Increased overall quality and lifespan of memory devices.


Original Abstract Submitted

Provided is a non-volatile memory device. The non-volatile memory device includes: a memory cell array including cell strings, each including memory cells respectively connected to word lines; a page buffer circuit including page buffers respectively connected to the memory cells through bit lines, wherein a first page buffer is connected to a first cell string through a first bit line; a control logic circuit configured to control a pre-sensing operation to disconnect the first bit line and the first cell string from each other during a pre-sensing period for detecting a defect of the first bit line and control a post-sensing operation to connect the first bit line and the first cell string to each other in a post-sensing period for detecting defects of the word lines and the first bit line; and a defect detection circuit configured to detect defects of the word lines based the sensing operations.