17971619. ADAPTIVE CLOCK GATING FOR IMPROVING WEAR OUT-INDUCED DUTY CYCLE SHIFT IN COMPUTER CLOCK NETWORK simplified abstract (Intel Corporation)
Contents
ADAPTIVE CLOCK GATING FOR IMPROVING WEAR OUT-INDUCED DUTY CYCLE SHIFT IN COMPUTER CLOCK NETWORK
Organization Name
Inventor(s)
Balkaran Gill of Cornelius OR (US)
Anisur Rahman of Beaverton OR (US)
Ketul B. Sutaria of Beaverton OR (US)
ADAPTIVE CLOCK GATING FOR IMPROVING WEAR OUT-INDUCED DUTY CYCLE SHIFT IN COMPUTER CLOCK NETWORK - A simplified explanation of the abstract
This abstract first appeared for US patent application 17971619 titled 'ADAPTIVE CLOCK GATING FOR IMPROVING WEAR OUT-INDUCED DUTY CYCLE SHIFT IN COMPUTER CLOCK NETWORK
Simplified Explanation
Clock Gating Technology
- Clock gating technology is described in this patent application.
- The technology involves detecting and enabling clock gating for a local clock of a computer core.
- The system then determines if a clock gating condition for the local clock is satisfied.
- Based on this determination, the clock gating polarity of the local clock is set.
Potential Applications: Clock gating technology can be used in various electronic devices such as smartphones, tablets, laptops, and servers to improve power efficiency and reduce energy consumption.
Problems Solved: This technology helps in reducing power consumption in electronic devices by selectively turning off clocks when they are not needed, thus saving energy and extending battery life.
Benefits: The benefits of clock gating technology include improved power efficiency, reduced energy consumption, longer battery life for portable devices, and overall cost savings in terms of energy usage.
Potential Commercial Applications of Clock Gating Technology: 1. "Enhancing Power Efficiency in Electronic Devices with Clock Gating Technology"
Possible Prior Art: One example of prior art in clock gating technology is the use of clock gating cells in digital circuits to reduce power consumption by disabling clocks to unused portions of the circuit.
Unanswered Questions: 1. How does this clock gating technology compare to other power-saving techniques in terms of effectiveness and efficiency? 2. Are there any potential drawbacks or limitations to implementing clock gating technology in certain electronic devices?
Original Abstract Submitted
This disclosure describes systems, methods, and devices related to clock gating. A device may detect that gating of a local clock of a computer core is enabled; detect, based on the detection that the gating is enabled, that a clock gating condition for the local clock is satisfied; and set a clock gating polarity of the local clock based on the detection that the clock gating condition for the local clock is satisfied.
