17968873. NON-VOLATILE MEMORY DEVICE AND OPERATING METHOD THEREOF simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
NON-VOLATILE MEMORY DEVICE AND OPERATING METHOD THEREOF
Organization Name
Inventor(s)
Young Geun Jeon of Hwaseong-si (KR)
Jae Yong Jeong of Yongin-si (KR)
Byung Yong Choi of Seongnam-si (KR)
NON-VOLATILE MEMORY DEVICE AND OPERATING METHOD THEREOF - A simplified explanation of the abstract
This abstract first appeared for US patent application 17968873 titled 'NON-VOLATILE MEMORY DEVICE AND OPERATING METHOD THEREOF
Simplified Explanation
The abstract describes a non-volatile memory device that includes a memory cell array, pass transistors, a voltage generator, and switch circuits.
- The memory cell array consists of multiple memory cells connected to word lines.
- The first pass transistors are connected to one side of the word lines, while the second pass transistors are connected to the other side.
- A voltage generator generates operating voltages and applies them to the memory cell array.
- The first switch circuit connects the first pass transistors to the voltage generator in response to a switch control signal.
- The second switch circuit connects the second pass transistors to the voltage generator in response to the same switch control signal.
Potential applications of this technology:
- Non-volatile memory devices used in various electronic devices such as computers, smartphones, and IoT devices.
- Storage devices that require high-speed read and write operations.
Problems solved by this technology:
- Non-volatile memory devices often face challenges in achieving high-speed read and write operations.
- The design and control of pass transistors and voltage generation can impact the performance and reliability of the memory device.
Benefits of this technology:
- Improved performance and reliability of non-volatile memory devices.
- Efficient utilization of operating voltages for the memory cell array.
- Simplified control circuitry for connecting pass transistors to the voltage generator.
Original Abstract Submitted
A non-volatile memory device includes a memory cell array including a plurality of memory cells respectively connected to a plurality of word lines; a plurality of first pass transistors each connected to one side of one of the plurality of word lines; a plurality of second pass transistors each connected to the other side of one of the plurality of word lines; a voltage generator configured to generate a plurality of operating voltages and to apply the plurality of operating voltages to the memory cell array; in response to a first switch control signal, a first switch circuit configured to connect the plurality of first pass transistors to the voltage generator; and in response to a first switch control signal, a second switch circuit configured to connect the plurality of second pass transistors to the voltage generator.