17968830. ELECTRONIC PACKAGE WITH INTEGRATED INTERCONNECT STRUCTURE simplified abstract (Intel Corporation)

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ELECTRONIC PACKAGE WITH INTEGRATED INTERCONNECT STRUCTURE

Organization Name

Intel Corporation

Inventor(s)

Bok Eng Cheah of Gelugor (MY)

Seok Ling Lim of Kulim Kedah (MY)

Jenny Shio Yin Ong of Bayan Lepas (MY)

Jackson Chung Peng Kong of Tanjung Tokong (MY)

Kooi Chi Ooi of Gelugor (MY)

ELECTRONIC PACKAGE WITH INTEGRATED INTERCONNECT STRUCTURE - A simplified explanation of the abstract

This abstract first appeared for US patent application 17968830 titled 'ELECTRONIC PACKAGE WITH INTEGRATED INTERCONNECT STRUCTURE

Simplified Explanation

The abstract describes a device with a package substrate containing at least one opening and an interconnect structure with a first segment extending under the package substrate and a second segment extending vertically through the opening.

  • The device includes a package substrate with openings and an interconnect structure with segments extending under and through the substrate.
  • The first segment of the interconnect structure extends under the bottom surface of the package substrate and beyond its footprint.
  • The second segment of the interconnect structure extends vertically from the first segment and at least partially through the openings in the package substrate.

Potential Applications

This technology could be applied in:

  • Semiconductor packaging
  • Microelectronics
  • Integrated circuits

Problems Solved

This technology helps in:

  • Improving signal transmission
  • Enhancing electrical connections
  • Reducing package size

Benefits

The benefits of this technology include:

  • Increased efficiency in electronic devices
  • Enhanced performance of integrated circuits
  • Compact design for space-saving applications

Potential Commercial Applications

The potential commercial applications of this technology could be in:

  • Consumer electronics
  • Telecommunications
  • Automotive industry

Possible Prior Art

One possible prior art for this technology could be:

  • Existing interconnect structures in semiconductor devices

Unanswered Questions

How does this technology impact the overall cost of electronic devices?

This article does not address the cost implications of implementing this technology in electronic devices.

Are there any limitations to the size or scale of devices that can incorporate this technology?

The article does not discuss any limitations regarding the size or scale of devices that can utilize this technology.


Original Abstract Submitted

A device is provided, including a package substrate including at least one opening extending through the package substrate, and an interconnect structure including a first segment and a second segment. The first segment may extend under a bottom surface of the package substrate and may further extend beyond a footprint of the package substrate. The second segment may extend vertically from the first segment and may extend at least partially through the at least one opening of the package substrate.