17962235. SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF simplified abstract (Tokyo Electron Limited)
Contents
- 1 SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 How does this technology compare to existing methods for forming metal gate structures in semiconductor devices?
- 1.11 What are the specific performance improvements achieved by using this method in semiconductor device fabrication?
- 1.12 Original Abstract Submitted
SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF
Organization Name
Inventor(s)
H. Jim Fulford of Albany NY (US)
Mark I. Gardner of Albany NY (US)
Partha Mukhopadhyay of Albany NY (US)
SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF - A simplified explanation of the abstract
This abstract first appeared for US patent application 17962235 titled 'SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF
Simplified Explanation
The method described in the abstract involves forming a fin structure with alternating semiconductor layers, performing a plasma doping process to create source/drain regions, and depositing an inner spacer layer before forming a metal gate structure.
- Formation of fin structure with alternating semiconductor layers
- Plasma doping process to create source/drain regions
- Deposition of inner spacer layer
- Formation of metal gate structure
Potential Applications
This technology can be applied in the manufacturing of advanced semiconductor devices, such as high-performance transistors for use in integrated circuits.
Problems Solved
This technology solves the problem of improving the performance and efficiency of semiconductor devices by optimizing the structure and doping process to enhance the functionality of the transistors.
Benefits
The benefits of this technology include increased speed, reduced power consumption, and improved overall performance of semiconductor devices.
Potential Commercial Applications
One potential commercial application of this technology is in the production of cutting-edge processors for computers, smartphones, and other electronic devices.
Possible Prior Art
One possible prior art for this technology could be the use of similar doping processes and spacer layers in the fabrication of semiconductor devices.
Unanswered Questions
How does this technology compare to existing methods for forming metal gate structures in semiconductor devices?
This article does not provide a direct comparison with existing methods for forming metal gate structures, leaving the reader to wonder about the specific advantages and disadvantages of this new approach.
What are the specific performance improvements achieved by using this method in semiconductor device fabrication?
The article does not delve into the specific performance enhancements resulting from the use of this method, leaving the reader curious about the quantitative benefits of implementing this technology.
Original Abstract Submitted
A method includes forming a fin structure over a substrate, the fin structure including alternating first semiconductor layers and second semiconductor layers stacked along a vertical direction; forming a dummy gate structure over the fin structure; performing a plasma doping process to form source/drain regions in each second semiconductor layer adjacent the dummy gate structure, where a portion of each second semiconductor layer interposing between the source/drain regions defines a channel region; forming a dielectric layer over the fin structure; removing the dummy gate structure to form a gate trench in the dielectric layer; selectively removing the first semiconductor layers to form openings interleaved with the second semiconductor layers; depositing an inner spacer layer to partially fill the gate trench and the openings, wherein the inner spacer layer overlaps with the source/drain regions along the lateral direction; and forming a metal gate structure over the inner spacer layer.
