17959123. DETECTING AND MITIGATING MEMORY ATTACKS simplified abstract (Microsoft Technology Licensing, LLC)

DETECTING AND MITIGATING MEMORY ATTACKS

Organization Name

Microsoft Technology Licensing, LLC

Inventor(s)

Ishwar Agarwal of Redmond WA (US)

Stefan Saroiu of Redmond WA (US)

Alastair Wolman of Seattle WA (US)

Daniel Sebastian Berger of Seattle WA (US)

DETECTING AND MITIGATING MEMORY ATTACKS - A simplified explanation of the abstract

This abstract first appeared for US patent application 17959123 titled 'DETECTING AND MITIGATING MEMORY ATTACKS

Simplified Explanation

The present disclosure describes systems and methods implemented on a memory controller for detecting and mitigating memory attacks, such as row hammer attacks. The memory controller can transition between counting mode and sampling mode to track activation counts for memory sub-banks and rows, respectively, in order to reduce vulnerability to attacks.

• Memory controller tracks activation counts for memory sub-banks and rows
• Transition between counting mode and sampling mode to mitigate row hammer attacks
• Consider various conditions to determine operating mode
• Reduce vulnerability to attacks by selectively transitioning between modes

Potential Applications

The technology described in the patent application could be applied in various industries where memory security is crucial, such as:

• Data centers
• Cloud computing
• Financial institutions

Problems Solved

The technology addresses the following issues:

• Vulnerability to memory attacks like row hammer attacks
• Ensuring memory security and integrity
• Minimizing downtime and data loss due to attacks

Benefits

The benefits of this technology include:

• Enhanced memory security
• Improved system reliability
• Reduced risk of data corruption or loss

Potential Commercial Applications

The technology could be commercially applied in:

• Memory controller manufacturing companies
• Cybersecurity firms
• IT infrastructure providers

Possible Prior Art

One example of prior art related to this technology is the "Row Hammer" vulnerability discovered in DRAM memory modules, which can be exploited to manipulate memory cells and potentially cause system crashes or data corruption.

How does the technology impact system performance?

The article does not provide information on whether the transition between counting mode and sampling mode affects system performance or memory access speeds.

What are the specific conditions that trigger the transition between operating modes?

The article mentions that the memory controller considers various conditions, but does not specify what these conditions are or how they are determined.

Original Abstract Submitted

The present disclosure relates to systems and methods implemented on a memory controller for detecting and mitigating memory attacks (e.g., row hammer attacks). For example, a memory controller may engage a counting mode in which activation counts for memory sub-banks are tracked. For example, a memory controller may engage a counting mode in which activation counts for memory rows of memory sub-banks are maintained. Under certain conditions, the memory controller may transition from the counting mode to a sampling mode to mitigate potential row hammer attacks. The memory controller may consider various conditions in determining whether to continue detecting and mitigating potential row hammer attacks in the sampling mode and/or transitioning back to the counting mode. By selectively transitioning between the different operating modes, the memory controller may reduce periods of time when the memory hardware is vulnerable to attacks.