17958284. INCORPORATION OF SUPERLATTICE SEMI-METALS FOR SCALED INTERCONNECTS simplified abstract (Intel Corporation)

From WikiPatents
Jump to navigation Jump to search

INCORPORATION OF SUPERLATTICE SEMI-METALS FOR SCALED INTERCONNECTS

Organization Name

Intel Corporation

Inventor(s)

Abhishek Anil Sharma of Portland OR (US)

INCORPORATION OF SUPERLATTICE SEMI-METALS FOR SCALED INTERCONNECTS - A simplified explanation of the abstract

This abstract first appeared for US patent application 17958284 titled 'INCORPORATION OF SUPERLATTICE SEMI-METALS FOR SCALED INTERCONNECTS

Simplified Explanation

The integrated circuit structure described in the abstract includes an interlayer dielectric (ILD) and an interconnect with multiple layers, alternating between metal layers and two-dimensional (2D) material layers.

  • The integrated circuit structure comprises an ILD and an interconnect with alternating layers of metal and 2D material.
  • The interconnect is made up of a plurality of first layers consisting of metal, and a plurality of second layers made of 2D material in an alternating pattern.

Potential Applications

This technology could be applied in:

  • Advanced semiconductor devices
  • High-performance electronic circuits

Problems Solved

This technology helps in:

  • Enhancing the performance of integrated circuits
  • Reducing power consumption in electronic devices

Benefits

The benefits of this technology include:

  • Improved speed and efficiency of electronic devices
  • Enhanced reliability and durability of integrated circuits

Potential Commercial Applications

This technology could be used in:

  • Mobile devices
  • Computer processors

Possible Prior Art

One possible prior art could be the use of traditional metal interconnects in integrated circuits.

Unanswered Questions

How does the integration of 2D materials impact the overall performance of the integrated circuit structure?

The abstract mentions the use of 2D materials in the interconnect layers, but it does not delve into the specific effects of this integration on the performance of the structure.

Are there any challenges or limitations associated with incorporating 2D materials into the interconnect layers?

While the abstract highlights the use of 2D materials in the interconnect layers, it does not address any potential challenges or limitations that may arise from this integration.


Original Abstract Submitted

Embodiments disclosed herein include an integrated circuit structure. In an embodiment, the integrated circuit structure comprises an interlayer dielectric (ILD). and an interconnect over the ILD. In an embodiment, the interconnect comprises a plurality of first layers, where the first layers comprise a metal, and a plurality of second layer in an alternating pattern with the plurality of first layers. In an embodiment, the second layers comprise a two-dimensional (2D) material.