17957751. HYBRID BONDING TECHNOLOGIES WITH THERMAL EXPANSION COMPENSATION STRUCTURES simplified abstract (Intel Corporation)

HYBRID BONDING TECHNOLOGIES WITH THERMAL EXPANSION COMPENSATION STRUCTURES

Organization Name

Intel Corporation

Inventor(s)

Jeremy Ecton of Gilbert AZ (US)

Aleksandar Aleksov of Chandler AZ (US)

Hiroki Tanaka of Gilbert AZ (US)

Brandon Marin of Gilbert AZ (US)

Srinivas Pietambaram of Chandler AZ (US)

Xavier Brun of Hillsboro OR (US)

HYBRID BONDING TECHNOLOGIES WITH THERMAL EXPANSION COMPENSATION STRUCTURES - A simplified explanation of the abstract

This abstract first appeared for US patent application 17957751 titled 'HYBRID BONDING TECHNOLOGIES WITH THERMAL EXPANSION COMPENSATION STRUCTURES

Simplified Explanation

The abstract describes a patent application related to microelectronic integrated circuit package structures. The innovation involves a first substrate connected to a second substrate through a conductive interconnect structure, with a dielectric material positioned next to the interconnect structure. A cavity in the first substrate near the interconnect structure contains some of the dielectric material.

• Explanation of the patent:
• First substrate connected to second substrate via conductive interconnect structure
• Dielectric material located adjacent to the conductive interconnect structure
• Cavity in the first substrate near the interconnect structure, with dielectric material inside

Potential Applications

The technology described in the patent application could be applied in:

• Microelectronics manufacturing
• Semiconductor packaging

Problems Solved

The innovation addresses the following issues:

• Enhancing the structural integrity of integrated circuit packages
• Improving the thermal management of microelectronic devices

Benefits

The patent application offers the following benefits:

• Increased reliability of integrated circuit packages
• Enhanced performance of microelectronic devices

Potential Commercial Applications

The technology could be utilized in various commercial sectors, including:

• Consumer electronics
• Telecommunications industry

Possible Prior Art

One possible prior art could be the use of cavities in substrates for thermal management in microelectronic devices.

Unanswered Questions

How does the innovation impact the overall size of the integrated circuit package?

The article does not provide information on whether the technology affects the size of the package.

What materials are used for the conductive interconnect structure?

The patent abstract does not specify the materials used for the conductive interconnect structure.

Original Abstract Submitted

Microelectronic integrated circuit package structures include a first substrate coupled to a second substrate by a conductive interconnect structure and a dielectric material adjacent to the conductive interconnect structure. A cavity in a surface of the first substrate is adjacent to the conductive interconnect structure. A portion of the dielectric material is within the cavity.