17957637. POROUS POLYMER DIELECTRIC LAYER ON CORE simplified abstract (Intel Corporation)
Contents
- 1 POROUS POLYMER DIELECTRIC LAYER ON CORE
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 POROUS POLYMER DIELECTRIC LAYER ON CORE - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Unanswered Questions
- 1.11 Original Abstract Submitted
POROUS POLYMER DIELECTRIC LAYER ON CORE
Organization Name
Inventor(s)
Whitney Bryks of Tempe AZ (US)
Aaditya Candadai of Chandler AZ (US)
Dilan Seneviratne of Phoenix AZ (US)
Junxin Wang of Gilbert AZ (US)
Peumie Abeyratne Kuragama of Chandler AZ (US)
POROUS POLYMER DIELECTRIC LAYER ON CORE - A simplified explanation of the abstract
This abstract first appeared for US patent application 17957637 titled 'POROUS POLYMER DIELECTRIC LAYER ON CORE
Simplified Explanation
The abstract describes an electronic device with an interposer, a porous polymer layer, and one or more dies connected to a metallic through via on the interposer.
- Interposer with metallic through via:
- The device includes an interposer with a metallic through via extending from one surface to another.
- Porous polymer layer:
- A first porous polymer layer is adjacent to the interposer's surface.
- Dies connected to metallic through via:
- One or more dies are coupled to the porous polymer layer and connected to the metallic through via.
Potential Applications
This technology could be applied in: - Advanced electronic devices - High-performance computing systems
Problems Solved
This innovation addresses: - Improved thermal management - Enhanced electrical connectivity
Benefits
The benefits of this technology include: - Increased device reliability - Enhanced performance efficiency
Potential Commercial Applications
This technology could be commercially benefit: - Consumer electronics industry - Telecommunications sector
Possible Prior Art
One possible prior art is the use of interposers in electronic devices for improved connectivity and performance.
Unanswered Questions
How does this technology impact the overall cost of electronic devices?
The article does not provide information on the cost implications of implementing this technology.
What are the environmental implications of using porous polymer layers in electronic devices?
The environmental impact of porous polymer layers is not discussed in the article.
Original Abstract Submitted
An electronic device can include an interposer, a first porous polymer layer, and one or more die. The interposer can include a metallic through via extending from a first surface of the interposer to a second surface of the interposer. The first polymer layer can be adjacent to the first surface of the interposer. The one or more dies can be coupled to the first porous polymer layer and connected to the metallic through via.
