17957603. IMPROVED REPLACEMENT ELECTRODE PROCESS FOR 3D FERROELECTRIC MEMORY simplified abstract (Intel Corporation)

IMPROVED REPLACEMENT ELECTRODE PROCESS FOR 3D FERROELECTRIC MEMORY

Organization Name

Intel Corporation

Inventor(s)

Christopher Neumann of Portland OR (US)

Cory Weinstein of Portland OR (US)

Nazila Haratipour of Portland OR (US)

Brian Doyle of Portland OR (US)

Sou-Chi Chang of Portland OR (US)

Tristan Tronic of Aloha OR (US)

Shriram Shivaraman of Hillsboro OR (US)

Uygar Avci of Portland OR (US)

IMPROVED REPLACEMENT ELECTRODE PROCESS FOR 3D FERROELECTRIC MEMORY - A simplified explanation of the abstract

This abstract first appeared for US patent application 17957603 titled 'IMPROVED REPLACEMENT ELECTRODE PROCESS FOR 3D FERROELECTRIC MEMORY

Simplified Explanation

The patent application describes multiple ferroelectric capacitor structures in memory devices, including integrated circuit devices, and techniques for forming these structures. Insulators separate individual outer plates in a ferroelectric capacitor array, supported between wider portions of a shared inner plate. The wider portions of the inner plate may be formed in lateral recesses between insulating layers. Ferroelectric material is deposited over the inner plate between insulating layers after removing sacrificial layers, with an etch-stop layer protecting the inner plate during this process.

• Insulators separate outer plates in a ferroelectric capacitor array.
• Wider portions of a shared inner plate support the insulators.
• Inner plate wider portions may be formed in lateral recesses between insulating layers.
• Ferroelectric material is deposited over the inner plate after removing sacrificial layers.
• An etch-stop layer protects the inner plate during the deposition process.

Potential Applications

This technology can be applied in memory devices, integrated circuit devices, and other electronic devices requiring ferroelectric capacitor structures.

Problems Solved

This innovation solves the challenge of efficiently forming multiple ferroelectric capacitor structures in memory devices, improving device performance and reliability.

Benefits

The benefits of this technology include enhanced memory device functionality, increased data storage capacity, and improved overall device performance.

Potential Commercial Applications

Potential commercial applications of this technology include memory chips, computer processors, and other electronic devices requiring high-performance memory components.

Possible Prior Art

One possible prior art in this field is the use of sacrificial layers in the formation of ferroelectric capacitor structures in memory devices.

How does this technology compare to existing methods for forming ferroelectric capacitor structures in memory devices?

This article does not provide a direct comparison to existing methods for forming ferroelectric capacitor structures in memory devices.

What are the specific materials and processes used in the formation of these capacitor structures?

The article does not delve into the specific materials and processes used in the formation of these capacitor structures.

Original Abstract Submitted

Multiple-ferroelectric capacitor structures in memory devices, including in integrated circuit devices, and techniques for forming the structures. Insulators separating individual outer plates in a ferroelectric capacitor array are supported between wider portions of a shared, inner plate. Wider portions of an inner plate may be formed in lateral recesses between insulating layers. Ferroelectric material may be deposited over the inner plate between insulating layers after removing sacrificial layers. An etch-stop layer may protect the inner plate when sacrificial layers are removed. An etch-stop or interface layer may remain over the inner plate adjacent insulators.