17957003. HIGH SURFACE AREA CAPACITOR IN AN ELECTRONIC SUBSTRATE PACKAGE simplified abstract (Intel Corporation)

From WikiPatents
Jump to navigation Jump to search

HIGH SURFACE AREA CAPACITOR IN AN ELECTRONIC SUBSTRATE PACKAGE

Organization Name

Intel Corporation

Inventor(s)

Jeremy D. Ecton of Gilbert AZ (US)

Brandon C. Marin of Gilbert AZ (US)

Haobo Chen of Chandler AZ (US)

Changhua Liu of Chandler AZ (US)

Srinivas Venkata Ramanuja Pietambaram of Chandler AZ (US)

HIGH SURFACE AREA CAPACITOR IN AN ELECTRONIC SUBSTRATE PACKAGE - A simplified explanation of the abstract

This abstract first appeared for US patent application 17957003 titled 'HIGH SURFACE AREA CAPACITOR IN AN ELECTRONIC SUBSTRATE PACKAGE

Simplified Explanation

The patent application describes microelectronics package architectures that incorporate high surface area capacitors within the substrate packages. The substrates consist of an anode material, a cathode material, and a conductive material. The anode material features peaks and valleys, while the cathode material has complementary peaks and valleys. The conductive material is located at the anode peaks.

  • Anode material with peaks and valleys
  • Cathode material with complementary peaks and valleys
  • Conductive material at anode peaks

Potential Applications

The technology could be applied in:

  • Microelectronics packaging
  • Energy storage devices
  • Power management systems

Problems Solved

The innovation addresses issues such as:

  • Increasing surface area for capacitors
  • Enhancing energy storage capacity
  • Improving power efficiency

Benefits

The technology offers benefits like:

  • Higher capacitance
  • Improved performance
  • Enhanced reliability

Potential Commercial Applications

The technology could find use in:

  • Consumer electronics
  • Automotive industry
  • Renewable energy sector

Possible Prior Art

One possible prior art could be the use of traditional capacitors in microelectronics packaging.

Unanswered Questions

How does this technology compare to existing capacitor designs in terms of performance and efficiency?

The article does not provide a direct comparison with traditional capacitor designs.

What are the potential challenges in implementing this technology on a large scale in manufacturing processes?

The article does not address the potential challenges in large-scale implementation of the technology.


Original Abstract Submitted

Disclosed herein are microelectronics package architectures utilizing in-situ high surface area capacitor in substrate packages and methods of manufacturing the same. The substrates may include an anode material, a cathode material, and a conductive material. The anode material may have an anode surface that may define a plurality of anode peaks and anode valleys. The cathode material may have a cathode surface that may define a plurality of cathode peaks and cathode valleys complementary to the plurality of anode peaks and anode valleys. The conductive material may be located at the anode peaks.