17956576. DETERMINISTIC JITTER COMPENSATION SCHEME FOR DTC TIMING PATH simplified abstract (TEXAS INSTRUMENTS INCORPORATED)

From WikiPatents
Jump to navigation Jump to search

DETERMINISTIC JITTER COMPENSATION SCHEME FOR DTC TIMING PATH

Organization Name

TEXAS INSTRUMENTS INCORPORATED

Inventor(s)

Yogesh Darwhekar of Bangalore (IN)

Abhrarup BARMAN Roy of Bangalore (IN)

Subhashish Mukherjee of Bangalore (IN)

Peeyoosh Mirajkar of Bangalore (IN)

DETERMINISTIC JITTER COMPENSATION SCHEME FOR DTC TIMING PATH - A simplified explanation of the abstract

This abstract first appeared for US patent application 17956576 titled 'DETERMINISTIC JITTER COMPENSATION SCHEME FOR DTC TIMING PATH

Simplified Explanation

The abstract of the patent application describes a system that includes an N divider, a load balancing circuit, and a switch connected to the output of a low dropout regulator. The load balancing circuit sinks a load balancing current at the output of the regulator during certain phases of the N divider.

  • The system includes an N divider coupled to the output of a low dropout regulator.
  • A load balancing circuit is connected to the N divider and sinks a load balancing current at the output of the regulator during specific phases.
  • A switch is coupled to the load balancing circuit and connects it to the output of the regulator during those phases.

Potential Applications

This technology could be applied in power management systems, voltage regulation circuits, and electronic devices requiring precise load balancing.

Problems Solved

This innovation helps in maintaining stable output voltage levels by balancing the load during different phases, ensuring efficient power distribution.

Benefits

- Improved voltage regulation - Enhanced power management efficiency - Increased reliability of electronic devices

Potential Commercial Applications

"Enhancing Power Management Efficiency with Load Balancing Technology"

Possible Prior Art

There may be prior art related to load balancing circuits in power management systems, but specific examples are not provided in the abstract.

Unanswered Questions

How does the load balancing circuit determine when to sink the load balancing current?

The abstract does not specify the mechanism or criteria used by the load balancing circuit to determine when to sink the load balancing current.

What is the impact of the load balancing circuit on the overall efficiency of the system?

The abstract does not mention the potential impact of the load balancing circuit on the efficiency of the system as a whole.


Original Abstract Submitted

In an example, a system includes an N divider coupled to an output of a low dropout regulator. The system also includes a load balancing circuit coupled to the N divider and configured to sink a load balancing current at the output of the low dropout regulator during one or more phases of the N divider. The system includes a switch coupled to the load balancing circuit and configured to connect the load balancing circuit to the output of the low dropout regulator during the one or more phases of the N divider.