17956421. DUAL SIDED EMBEDDED PASSIVES VIA PANEL LEVEL THERMAL COMPRESSION BONDING simplified abstract (Intel Corporation)
Contents
- 1 DUAL SIDED EMBEDDED PASSIVES VIA PANEL LEVEL THERMAL COMPRESSION BONDING
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 DUAL SIDED EMBEDDED PASSIVES VIA PANEL LEVEL THERMAL COMPRESSION BONDING - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Unanswered Questions
- 1.11 Original Abstract Submitted
DUAL SIDED EMBEDDED PASSIVES VIA PANEL LEVEL THERMAL COMPRESSION BONDING
Organization Name
Inventor(s)
Kristof Darmawikarta of Chandler AZ (US)
Ravindranath V. Mahajan of Chandler AZ (US)
Srinivas Venkata Ramanuja Pietambaram of Chandler AZ (US)
Beomseok Choi of Chandler AZ (US)
DUAL SIDED EMBEDDED PASSIVES VIA PANEL LEVEL THERMAL COMPRESSION BONDING - A simplified explanation of the abstract
This abstract first appeared for US patent application 17956421 titled 'DUAL SIDED EMBEDDED PASSIVES VIA PANEL LEVEL THERMAL COMPRESSION BONDING
Simplified Explanation
The electronic device described in the patent application includes a substrate with buildup layers containing contact pads, as well as a discrete passive electronic component integrated within the layers.
- The device has a core layer within the substrate.
- Buildup layers are present on the first surface of the core layer, with first contact pads below the top surface and second contact pads on the top surface.
- A discrete passive electronic component is placed within the buildup layers, featuring bottom contact pads on the bottom surface and top contact pads on the top surface.
- The bottom contact pads of the discrete component are bonded to the first contact pads of the buildup layers, while the top contact pads are electrically connected to the second contact pads.
Potential Applications
This technology could be used in various electronic devices such as smartphones, tablets, laptops, and wearables.
Problems Solved
This innovation allows for the integration of discrete passive electronic components within the substrate of electronic devices, saving space and improving overall performance.
Benefits
- Space-saving design - Enhanced performance - Improved reliability
Potential Commercial Applications
"Integrated Passive Electronic Component Technology for Electronic Devices"
Possible Prior Art
There may be prior art related to the integration of discrete passive electronic components within electronic devices, but specific examples are not provided in the patent application.
Unanswered Questions
How does this technology impact the overall cost of electronic devices?
The cost implications of integrating discrete passive electronic components within the substrate are not addressed in the patent application.
What are the potential challenges in manufacturing electronic devices using this technology?
The manufacturing process and any associated challenges are not discussed in detail in the patent application.
Original Abstract Submitted
An electronic device includes a substrate including a core layer; buildup layers on a first surface of the core layer, the buildup layers including first contact pads below the top surface of the buildup layers and second contact pads on a top surface of the buildup layers; and a discrete passive electronic component disposed in the buildup layers, the discrete component including bottom contact pads on a bottom surface of the discrete component and top contact pads on a top surface of the discrete component. The bottom contact pads of the discrete component are bonded to the first contacts pads of the buildup layers and the top contact pads of the discrete component are electrically connected to the second contact pads of the buildup layers.
