17956338. EMBEDDED PASSIVES WITH CAVITY SIDEWALL INTERCONNECT IN GLASS CORE ARCHITECTURE simplified abstract (Intel Corporation)

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EMBEDDED PASSIVES WITH CAVITY SIDEWALL INTERCONNECT IN GLASS CORE ARCHITECTURE

Organization Name

Intel Corporation

Inventor(s)

Kristof Darmawikarta of Chandler AZ (US)

Srinivas Venkata Ramanuja Pietambaram of Chandler AZ (US)

Tarek A. Ibrahim of Mesa AZ (US)

Cary Kuliasha of Mesa AZ (US)

Siddharth K. Alur of Chandler AZ (US)

Jung Kyu Han of Chandler AZ (US)

Beomseok Choi of Chandler AZ (US)

Russell K. Mortensen of Chandler AZ (US)

Andrew Collins of Chandler AZ (US)

Haobo Chen of Chandler AZ (US)

Brandon C. Marin of Gilbert AZ (US)

EMBEDDED PASSIVES WITH CAVITY SIDEWALL INTERCONNECT IN GLASS CORE ARCHITECTURE - A simplified explanation of the abstract

This abstract first appeared for US patent application 17956338 titled 'EMBEDDED PASSIVES WITH CAVITY SIDEWALL INTERCONNECT IN GLASS CORE ARCHITECTURE

Simplified Explanation

The abstract describes an electronic device with a substrate containing a cavity plated with a conductive material, housing a passive electronic component, and providing electrical continuity through the substrate.

  • The electronic device includes a substrate with a core layer.
  • A cavity is formed in the core layer, with plated sidewalls.
  • A prefabricated passive electronic component is placed in the cavity.
  • A cavity sidewall connection ensures electrical continuity through the substrate.

Potential Applications

This technology could be used in:

  • Miniaturized electronic devices
  • Wearable technology
  • IoT devices

Problems Solved

  • Integration of passive electronic components in small devices
  • Ensuring electrical connectivity in compact designs

Benefits

  • Space-saving design
  • Enhanced functionality in small devices
  • Improved reliability due to secure electrical connections

Potential Commercial Applications

  • Consumer electronics
  • Medical devices
  • Automotive electronics

Possible Prior Art

One possible prior art could be the use of microelectronic packaging techniques to integrate components in electronic devices.

Unanswered Questions

How does this technology impact the overall cost of electronic devices?

This article does not address the cost implications of implementing this technology in electronic devices.

What are the environmental implications of using plated conductive materials in electronic devices?

The environmental impact of using plated conductive materials is not discussed in this article.


Original Abstract Submitted

An electronic device includes a substrate including a core layer; a cavity formed in the core layer, wherein the cavity includes sidewalls plated with a conductive material; a prefabricated passive electronic component disposed in the cavity; and a cavity sidewall connection providing electrical continuity from the plated cavity sidewalls to a first surface of the substrate and to a second surface of the substrate.