17951337. SEMICONDUCTOR MEMORY DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

SEMICONDUCTOR MEMORY DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

Yun Sun Jang of Seoul (KR)

Moo Rym Choi of Yongin-si (KR)

Jung Tae Sung of Seoul (KR)

SEMICONDUCTOR MEMORY DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 17951337 titled 'SEMICONDUCTOR MEMORY DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME

Simplified Explanation

The abstract describes a semiconductor memory device with a peripheral logic structure and a cell array structure. The device includes a bypass via that connects the cell substrate and the peripheral logic substrate. The bypass via has a linear shape extending in at least one direction parallel to the upper surface of the cell substrate.

• The patent application describes a semiconductor memory device with a unique bypass via structure.
• The bypass via connects the cell substrate and the peripheral logic substrate.
• The bypass via has a linear shape that extends in at least one direction parallel to the upper surface of the cell substrate.

Potential Applications

• This technology can be used in various semiconductor memory devices, such as RAM (Random Access Memory) or flash memory.
• It can be implemented in electronic devices like smartphones, tablets, computers, and other devices that require memory storage.

Problems Solved

• The bypass via solves the problem of connecting the cell substrate and the peripheral logic substrate in a semiconductor memory device.
• It provides a reliable and efficient connection between the two substrates.

Benefits

• The linear shape of the bypass via allows for a compact design and efficient use of space.
• The connection provided by the bypass via ensures proper functioning of the semiconductor memory device.
• The technology improves the overall performance and reliability of the memory device.

Original Abstract Submitted

A semiconductor memory device has a peripheral logic structure including a peripheral logic substrate and a peripheral logic insulating film on the peripheral logic substrate. A cell array structure includes a cell substrate and a source structure that are sequentially stacked on the peripheral logic structure. A bypass via electrically connects the cell substrate and the peripheral logic substrate. The bypass via has a linear shape extending in at least one of first and second directions on the cell substrate. The first and second directions are parallel to an upper surface of the cell substrate.