17948893. STRIP LINE DELAY MATCHING USING PRINTED DIELECTRIC MATERIAL simplified abstract (Dell Products L.P.)

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STRIP LINE DELAY MATCHING USING PRINTED DIELECTRIC MATERIAL

Organization Name

Dell Products L.P.

Inventor(s)

Sandor Farkas of Round Rock TX (US)

Bhyrav Mutnury of Austin TX (US)

Timothy M. Lambert of Austin TX (US)

STRIP LINE DELAY MATCHING USING PRINTED DIELECTRIC MATERIAL - A simplified explanation of the abstract

This abstract first appeared for US patent application 17948893 titled 'STRIP LINE DELAY MATCHING USING PRINTED DIELECTRIC MATERIAL

Simplified Explanation

The abstract describes a printed circuit board with two insulating layers, strip line circuit traces, and a patterned dielectric material that delays signals. Here is a simplified explanation of the patent application:

  • The circuit board has two insulating layers.
  • There are strip line circuit traces on the first insulating layer.
  • The first trace carries a signal and is shorter than the second trace.
  • The second trace carries a different signal and is longer than the first trace.
  • A patterned dielectric material delays the first signal relative to the second signal.
  • The second insulating layer covers the traces and dielectric material.

Potential Applications: - High-speed data transmission systems - RF and microwave communication devices

Problems Solved: - Signal interference and crosstalk - Signal delay management

Benefits: - Improved signal integrity - Enhanced performance of electronic devices

Potential Commercial Applications: - Telecommunications equipment - Aerospace and defense systems

Possible Prior Art: - Similar techniques may have been used in high-frequency circuit design in the past.

Unanswered Questions: 1. How does the patterned dielectric material specifically delay the signal? 2. What are the specific advantages of using strip line circuit traces in this configuration?


Original Abstract Submitted

A printed circuit board includes first and second insulating layers, first and second strip line circuit traces formed on a surface of the first insulating layer, and a patterned dielectric material. The first strip line circuit trace has a first length and carries a first signal. The second strip line circuit trace is adjacent to the first strip line circuit trace, has a second length longer than the first length, and carries a second signal. The patterned dielectric material is provided over a portion of the first length to delay the first signal relative to the second signal. The second insulating layer is affixed to the surface and covers the first and second strip line circuit traces and the patterned dielectric material.