17947397. MODULE BOARD AND MEMORY MODULE INCLUDING THE SAME simplified abstract (SAMSUNG ELECTRONICS CO.,LTD.)
Contents
MODULE BOARD AND MEMORY MODULE INCLUDING THE SAME
Organization Name
Inventor(s)
Jeonghoon Baek of Hwaseongi-si (KR)
Seunghee Mun of Yongin-si (KR)
MODULE BOARD AND MEMORY MODULE INCLUDING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 17947397 titled 'MODULE BOARD AND MEMORY MODULE INCLUDING THE SAME
Simplified Explanation
The patent application describes a module board and a memory module. The module board has various signal lines and terminals for connecting clock signals between different modules.
- The module board includes a first branch line that connects a clock signal terminal to a first branch point.
- A first signal line connects the first branch point to a first module clock signal terminal.
- A second signal line connects the first module clock signal terminal to the kmodule clock signal terminal and a first termination resistance terminal.
- A third signal line connects the first branch point to a (k+1)module clock signal terminal.
- A fourth signal line connects the (k+1)module clock signal terminal to a 2kmodule clock signal terminal and the second termination resistance terminal.
- The length of the third signal line is greater than the combined length of the first signal line and the second signal line.
Potential applications of this technology:
- Memory modules in computer systems
- High-speed data transfer systems
- Communication devices with multiple modules
Problems solved by this technology:
- Efficient and reliable transmission of clock signals between modules
- Minimizing signal degradation and interference
- Simplifying the design and layout of module boards
Benefits of this technology:
- Improved performance and reliability of memory modules
- Faster data transfer rates
- Simplified integration of multiple modules in a system
Original Abstract Submitted
A module board and a memory module are provided. The module board includes a first branch line for connecting a clock signal terminal disposed on at least one surface to a first branch point; a first signal line for connecting the first branch point to a first module clock signal terminal; a second signal line for connecting the first module clock signal terminal to the kmodule clock signal terminal and a first termination resistance terminal; a third signal line for connecting the first branch point to a (k+1)module clock signal terminal; and a fourth signal line for connecting the (k+1)module clock signal terminal to a 2kmodule clock signal terminal and the second termination resistance terminal, wherein a length of the third signal line is greater than a sum of a length of the first signal line and a length of the second signal line.
