17946017. COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR (CMOS) APPARATUS WITH SELF-ALIGNED BACKSIDE CONTACT simplified abstract (International Business Machines Corporation)
Contents
- 1 COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR (CMOS) APPARATUS WITH SELF-ALIGNED BACKSIDE CONTACT
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR (CMOS) APPARATUS WITH SELF-ALIGNED BACKSIDE CONTACT - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Unanswered Questions
- 1.11 Original Abstract Submitted
COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR (CMOS) APPARATUS WITH SELF-ALIGNED BACKSIDE CONTACT
Organization Name
International Business Machines Corporation
Inventor(s)
Tsung-Sheng Kang of Ballston Lake NY (US)
Tao Li of Slingerlands NY (US)
Ruilong Xie of Niskayuna NY (US)
Chih-Chao Yang of Glenmont NY (US)
COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR (CMOS) APPARATUS WITH SELF-ALIGNED BACKSIDE CONTACT - A simplified explanation of the abstract
This abstract first appeared for US patent application 17946017 titled 'COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR (CMOS) APPARATUS WITH SELF-ALIGNED BACKSIDE CONTACT
Simplified Explanation
The abstract of the patent application describes a CMOS apparatus that includes an n-doped field effect transistor (nFET) and a p-doped field effect transistor (pFET), each with a source structure and a drain structure. A common backside drain contact connects the nFET drain structure and the pFET drain structure to a backside interconnect layer.
- The patent application describes a CMOS apparatus with both nFET and pFET transistors.
- The apparatus includes a common backside drain contact for connecting the drain structures of the nFET and pFET to a backside interconnect layer.
Potential Applications
The technology described in the patent application could be applied in:
- Integrated circuits
- Semiconductor devices
Problems Solved
The technology helps in:
- Improving the efficiency of CMOS apparatus
- Enhancing the performance of field effect transistors
Benefits
The benefits of this technology include:
- Increased connectivity between nFET and pFET drain structures
- Enhanced overall functionality of the CMOS apparatus
Potential Commercial Applications
The technology could be utilized in:
- Consumer electronics
- Telecommunications industry
Possible Prior Art
One possible prior art could be the use of separate drain contacts for nFET and pFET transistors in CMOS apparatus.
Unanswered Questions
How does the common backside drain contact impact the overall performance of the CMOS apparatus?
The impact of the common backside drain contact on the performance of the CMOS apparatus is not explicitly discussed in the abstract. Further details on this aspect could provide a better understanding of the technology's benefits.
Are there any specific design considerations for implementing the common backside drain contact in CMOS apparatus?
The abstract does not mention any specific design considerations for implementing the common backside drain contact. Exploring this aspect further could shed light on the practical implications of the technology.
Original Abstract Submitted
A CMOS apparatus includes an n-doped field effect transistor (nFET); and a p-doped field effect transistor (pFET), each of which has a source structure and a drain structure. A common backside drain contact, which is disposed at the backside surface of the nFET and the pFET, electrically connects the nFET drain structure and the pFET drain structure to a backside interconnect layer.
