17944310. CHIPLET STATE AWARE AND DYNAMIC VOLTAGE REGULATOR EVENT HANDLING simplified abstract (Intel Corporation)
Contents
- 1 CHIPLET STATE AWARE AND DYNAMIC VOLTAGE REGULATOR EVENT HANDLING
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 CHIPLET STATE AWARE AND DYNAMIC VOLTAGE REGULATOR EVENT HANDLING - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Original Abstract Submitted
CHIPLET STATE AWARE AND DYNAMIC VOLTAGE REGULATOR EVENT HANDLING
Organization Name
Inventor(s)
Jianwei Dai of Portland OR (US)
Yashwitha Suvarna of Union City CA (US)
Boon Hui Ang of Bukit Mertajam (MY)
Pranali Shah of Hillsboro OR (US)
CHIPLET STATE AWARE AND DYNAMIC VOLTAGE REGULATOR EVENT HANDLING - A simplified explanation of the abstract
This abstract first appeared for US patent application 17944310 titled 'CHIPLET STATE AWARE AND DYNAMIC VOLTAGE REGULATOR EVENT HANDLING
Simplified Explanation
Embodiments described herein involve chiplet state aware and dynamic prioritization of voltage regulator event indication handling. An intelligent arbiter notifies chiplets of VR events in a dynamic priority scheme considering factors such as chiplet state, power consumption, transition time, outstanding VR requests, latency sensitivity, and more. The arbiter uses dynamic prioritization to maximize efficiency and minimize power consumption as chiplet states change during operation.
- Chiplet state aware and dynamic prioritization of voltage regulator event indication handling
- Intelligent arbiter notifies chiplets of VR events based on multiple factors
- Dynamic priority scheme considers chiplet state, power consumption, transition time, outstanding requests, latency sensitivity, etc.
- Maximizes efficiency and minimizes power consumption with dynamic prioritization
Potential Applications
This technology could be applied in:
- Mobile devices
- Internet of Things (IoT) devices
- Wearable technology
- Autonomous vehicles
Problems Solved
This innovation addresses issues such as:
- Efficient power management in dynamic chiplet states
- Prioritizing voltage regulator events effectively
- Minimizing power consumption in chiplet systems
Benefits
The benefits of this technology include:
- Improved power efficiency
- Enhanced performance in chiplet systems
- Dynamic prioritization for optimal operation
Potential Commercial Applications
Optimized power management for chiplet systems in:
- Consumer electronics
- Automotive industry
- Industrial automation
- Medical devices
Unanswered Questions
How does the intelligent arbiter determine the priority of VR events for chiplets?
The intelligent arbiter uses a dynamic prioritization scheme based on factors such as chiplet state, power consumption, transition time, outstanding requests, and latency sensitivity to determine the priority of VR events for chiplets.
What impact does dynamic prioritization have on overall system performance?
Dynamic prioritization maximizes efficiency and minimizes power consumption in chiplet systems, leading to improved performance and optimized operation.
Original Abstract Submitted
Embodiments described herein may include apparatus, systems, techniques or processes that are directed to chiplet state aware and dynamic prioritization of voltage regulator event indication handling. An intelligent arbiter notifies chiplets of VR events in a dynamic priority scheme that considers multiple factors such as chiplet state (for example, active, sleep, deep sleep, and the like), chiplet power consumption and time frame for transitioning to an active state, outstanding VR requests, chiplet latency sensitivity and the like in its prioritization of chiplet notifications. As chiplet states themselves are dynamic with a chiplet transitioning between multiple states during operation, the intelligent arbiter may also utilize a dynamic prioritization scheme to maximize efficiency and minimize power consumption.
