17944031. SYSTEMS AND METHODS FOR ADAPTIVE HYBRID HARDWARE PRE-FETCH simplified abstract (Huawei Technologies Co., Ltd.)

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SYSTEMS AND METHODS FOR ADAPTIVE HYBRID HARDWARE PRE-FETCH

Organization Name

Huawei Technologies Co., Ltd.

Inventor(s)

Elnaz Ebrahimi of San Jose CA (US)

Ehsan Khish Ardestani Zadeh of San Jose CA (US)

Wei-Yu Chen of Fremont CA (US)

Liang Peng of San Jose CA (US)

SYSTEMS AND METHODS FOR ADAPTIVE HYBRID HARDWARE PRE-FETCH - A simplified explanation of the abstract

This abstract first appeared for US patent application 17944031 titled 'SYSTEMS AND METHODS FOR ADAPTIVE HYBRID HARDWARE PRE-FETCH

Simplified Explanation

The patent application describes an apparatus that includes a processor core and a memory hierarchy, which includes main memory and one or more caches between the main memory and the processor core. The apparatus also includes multiple hardware pre-fetchers and a pre-fetch control circuit.

  • The apparatus has a processor core and a memory hierarchy with caches and main memory.
  • Multiple hardware pre-fetchers are connected to the memory hierarchy.
  • A pre-fetch control circuit is connected to the hardware pre-fetchers.
  • The pre-fetch control circuit compares changes in cache performance metrics over different sampling intervals.
  • The pre-fetch control circuit adjusts the operation of the hardware pre-fetchers based on changes in performance metrics between sampling intervals.

Potential applications of this technology:

  • Improving the performance of computer systems by optimizing the pre-fetching of data from memory.
  • Enhancing the efficiency of cache systems in processors.
  • Optimizing the utilization of memory resources in computer systems.

Problems solved by this technology:

  • Inefficient pre-fetching of data from memory can lead to performance bottlenecks in computer systems.
  • Inadequate utilization of cache systems can result in slower processing speeds.
  • Poor management of memory resources can lead to inefficient use of available memory.

Benefits of this technology:

  • Improved overall performance of computer systems by optimizing pre-fetching.
  • Enhanced processing speeds through efficient utilization of cache systems.
  • Better utilization of memory resources, leading to improved system efficiency.


Original Abstract Submitted

An apparatus includes a processor core and a memory hierarchy. The memory hierarchy includes main memory and one or more caches between the main memory and the processor core. A plurality of hardware pre-fetchers are coupled to the memory hierarchy and a pre-fetch control circuit is coupled to the plurality of hardware pre-fetchers. The pre-fetch control circuit is configured to compare changes in one or more cache performance metrics over two or more sampling intervals and control operation of the plurality of hardware pre-fetchers in response to a change in one or more performance metrics between at least a first sampling interval and a second sampling interval.

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