17937955. FIELD EFFECT TRANSISTOR WITH BACKSIDE SOURCE/DRAIN simplified abstract (International Business Machines Corporation)

FIELD EFFECT TRANSISTOR WITH BACKSIDE SOURCE/DRAIN

Organization Name

International Business Machines Corporation

Inventor(s)

Ruilong Xie of Niskayuna NY (US)

Lawrence A. Clevenger of Saratoga Springs NY (US)

Brent A. Anderson of Jericho VT (US)

Kisik Choi of Watervliet NY (US)

Su Chen Fan of Cohoes NY (US)

Shogo Mochizuki of Mechanicville NY (US)

SON Nguyen of Schenectady NY (US)

FIELD EFFECT TRANSISTOR WITH BACKSIDE SOURCE/DRAIN - A simplified explanation of the abstract

This abstract first appeared for US patent application 17937955 titled 'FIELD EFFECT TRANSISTOR WITH BACKSIDE SOURCE/DRAIN

Simplified Explanation

The semiconductor device described in the abstract is a nanostructure field effect transistor (FET) with unique frontside and backside source/drain (S/D) contacts. Here are some key points to explain the patent/innovation:

• The FET includes a gate and a first S/D region with a frontside S/D contact extending vertically upward from the top surface.
• A second S/D region is present, extending below the bottom surface of the gate, with a backside S/D contact extending vertically downward from the bottom surface.

Potential Applications

The technology described in this patent application could be applied in various fields such as:

• Nanoelectronics
• Semiconductor industry
• Integrated circuits

Problems Solved

This technology addresses several issues in the semiconductor device design, including:

• Improving contact resistance
• Enhancing device performance
• Increasing efficiency of FETs

Benefits

The benefits of this technology include:

• Enhanced electrical performance
• Improved reliability
• Increased functionality of semiconductor devices

Potential Commercial Applications

With its unique design and improved performance, this technology could find applications in:

• Consumer electronics
• Telecommunications
• Automotive industry

Possible Prior Art

One possible prior art for this technology could be the traditional FET designs with standard source/drain contacts on the same side of the device.

Unanswered Questions

How does this technology compare to existing FET designs in terms of performance and efficiency?

The article does not provide a direct comparison with existing FET designs to evaluate its performance and efficiency.

Are there any specific manufacturing challenges associated with implementing this technology?

The article does not address any potential manufacturing challenges that may arise when implementing this technology.

Original Abstract Submitted

A semiconductor device includes a nanostructure field effect transistor (FET). The FET includes a gate and a first source or drain (S/D) region. A frontside S/D contact may be connected to and extends vertically upward from a top surface of the first S/D region. The FET further includes a second S/D region. The second S/D region extends below a bottom surface of the gate. A backside S/D contact may be connected to and extend vertically downward from a bottom surface of the second S/D region.