17937229. SINGLE PRECISION SUPPORT FOR SYSTOLIC PIPELINE IN A GRAPHICS ENVIRONMENT simplified abstract (Intel Corporation)
Contents
- 1 SINGLE PRECISION SUPPORT FOR SYSTOLIC PIPELINE IN A GRAPHICS ENVIRONMENT
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 SINGLE PRECISION SUPPORT FOR SYSTOLIC PIPELINE IN A GRAPHICS ENVIRONMENT - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Unanswered Questions
- 1.11 Original Abstract Submitted
SINGLE PRECISION SUPPORT FOR SYSTOLIC PIPELINE IN A GRAPHICS ENVIRONMENT
Organization Name
Inventor(s)
Jiasheng Chen of El Dorado Hills CA (US)
Changwon Rhee of Rocklin CA (US)
Kevin Hurd of Flagler Beach FL (US)
Gregory Henry of Hillsboro OR (US)
Peter Caday of Hillsboro OR (US)
Kristopher Wong of San Diego CA (US)
SINGLE PRECISION SUPPORT FOR SYSTOLIC PIPELINE IN A GRAPHICS ENVIRONMENT - A simplified explanation of the abstract
This abstract first appeared for US patent application 17937229 titled 'SINGLE PRECISION SUPPORT FOR SYSTOLIC PIPELINE IN A GRAPHICS ENVIRONMENT
Simplified Explanation
The apparatus disclosed in the patent application is designed to support single precision in a systolic pipeline in a graphics environment. Here are some key points to explain the innovation:
- Processor with systolic array hardware
- Receive data in first precision format
- Convert original value into two split values with lower precision
- Perform matrix multiplication using split values
- Utilize split-term operation with feedback wiring and local reduction
- Generate emulated result in first precision format
Potential Applications
This technology could be applied in graphics processing units (GPUs) for efficient matrix multiplication operations in single precision format.
Problems Solved
The apparatus addresses the challenge of performing matrix multiplication with reduced precision values in a systolic pipeline, optimizing performance in a graphics environment.
Benefits
- Improved efficiency in matrix multiplication operations - Enhanced performance in graphics processing tasks - Reduced hardware complexity for single precision support
Potential Commercial Applications
"Enhancing Graphics Processing Efficiency with Single Precision Support"
Possible Prior Art
There may be prior art related to systolic arrays and matrix multiplication operations in graphics environments, but specific examples are not provided in the patent application.
Unanswered Questions
How does the apparatus handle error propagation in the matrix multiplication process?
The patent application does not delve into the specifics of error handling or propagation in the matrix multiplication operation using the systolic array hardware.
What impact does the use of split values with lower precision have on the overall accuracy of the matrix multiplication results?
The patent application does not discuss the potential trade-offs in accuracy that may arise from using split values with lower precision in the matrix multiplication operation.
Original Abstract Submitted
An apparatus to facilitate single precision support for systolic pipeline in a graphics environment is disclosed. The apparatus includes a processor comprising systolic array hardware including a plurality of data processing units, wherein the systolic array hardware is to: receive data for performance of a matrix multiplication operation in a first precision format; convert an original value of the data into two split values with a second precision format having a lower precision than the first precision format; perform the matrix multiplication operation using the two split values in the second precision format, the matrix multiplication operation comprising a split-term operation that utilizes two passes through the systolic array hardware with feedback wiring and local reduction; and generate an emulated result for the matrix multiplication operation in the first precision format.
