17937043. FERROELECTRIC CAPACITOR WITHIN BACKSIDE INTERCONNECT simplified abstract (Intel Corporation)

FERROELECTRIC CAPACITOR WITHIN BACKSIDE INTERCONNECT

Organization Name

Intel Corporation

Inventor(s)

Sourav Dutta of Hillsboro OR (US)

Nazila Haratipour of Portland OR (US)

Uygar E. Avci of Portland OR (US)

Vachan Kumar of Hillsboro OR (US)

Christopher M. Neumann of Portland OR (US)

Shriram Shivaraman of Hillsboro OR (US)

Sou-Chi Chang of Portland OR (US)

Brian S. Doyle of Portland OR (US)

FERROELECTRIC CAPACITOR WITHIN BACKSIDE INTERCONNECT - A simplified explanation of the abstract

This abstract first appeared for US patent application 17937043 titled 'FERROELECTRIC CAPACITOR WITHIN BACKSIDE INTERCONNECT

Simplified Explanation

The patent application describes backside integrated circuit capacitor structures, where a layer of ferroelectric material is sandwiched between first and second electrodes. The first electrode is connected to a transistor terminal via a backside contact that extends downward from the bottom surface of the transistor terminal to the first electrode. The second electrode is connected to a backside interconnect feature. The capacitor can have a height that extends through at least one backside interconnect layer and can be a multi-plate capacitor with multiple plate line conductors arranged in a staircase structure.

• Backside integrated circuit capacitor structures:

   - Include a layer of ferroelectric material between first and second electrodes.
   - First electrode connected to a transistor terminal via a backside contact.
   - Second electrode connected to a backside interconnect feature.
   - Capacitor can have a height extending through backside interconnect layers.
   - Can be a multi-plate capacitor with multiple plate line conductors.

Potential Applications

The technology can be used in non-volatile memory devices or as part of the cache in processors.

Problems Solved

- Improved integration of capacitors in integrated circuits. - Enhanced performance and reliability of memory devices.

Benefits

- Higher capacitance density. - Self-alignment with source or drain regions. - Improved overall performance of integrated circuits.

Potential Commercial Applications

Optimized for use in non-volatile memory devices for data storage applications.

Possible Prior Art

There may be prior art related to integrated circuit capacitor structures, but specific examples are not provided in the abstract.

How does this technology impact the overall power consumption of integrated circuits?

The abstract does not mention the impact of this technology on power consumption in integrated circuits. Further research or detailed information from the patent application may be needed to address this question.

Are there any specific manufacturing processes required for implementing these backside integrated circuit capacitor structures?

The abstract does not detail any specific manufacturing processes for implementing these capacitor structures. Additional information from the full patent application or related documents may be necessary to answer this question.

Original Abstract Submitted

Backside integrated circuit capacitor structures. In an example, a capacitor structure includes a layer of ferroelectric material between first and second electrodes. The first electrode can be connected to a transistor terminal by a backside contact that extends downward from a bottom surface of the transistor terminal to the first electrode. The transistor terminal can be, for instance, a source or drain region, and the backside contact can be self-aligned with the source or drain region. The second electrode can be connected to a backside interconnect feature. In some cases, the capacitor has a height that extends through at least one backside interconnect layer. In some cases, the capacitor is a multi-plate capacitor in which the second conductor is one of a plurality of plate line conductors arranged in a staircase structure. The capacitor structure may be, for example, part of a non-volatile memory device or the cache of a processor.